XilinxZynq-7000SoC设备电气特性与参数详解资源-CSDN文库

需积分: 5 112 浏览量 2024-11-26 21:53:33 上传评论收藏 2.64MB PDF 举报

资源推荐

资源详情

资源评论

DS191 (v1.18) April 12, 2017 www.xilinx.com

Product Specification 1

in the United States and other countries. AMBA, AMBA Designer, ARM, Cortex-A9, CoreSight, Cortex, PrimeCell, ARM Powered, and ARM Connected Partner are trademarks

of ARM Ltd. All other trademarks are the property of their respective owners.

Introduction

The Zynq®-7000 All Programmable SoCs are available in

-3, -2, -2LI, -1, and -1LQ speed grades, with -3 having the

highest performance. The -2LI devices operate at

programmable logic (PL) V

CCINT

CCBRAM

= 0.95V and are

screened for lower maximum static power. The speed

specification of a -2LI device is the same as that of a

-2 device. The -1LQ devices operate at the same voltage

and speed as the -1Q devices and are screened for lower

power. Zynq-7000 device DC and AC characteristics are

specified in commercial, extended, industrial, and

expanded (Q-temp) temperature ranges. Except the

operating temperature range or unless otherwise noted, all

the DC and AC electrical parameters are the same for a

particular speed grade (that is, the timing characteristics of

a -1 speed grade industrial device are the same as for a -1

speed grade commercial device). However, only selected

speed grades and/or devices are available in the

commercial, extended, or industrial temperature ranges.

All supply voltage and junction temperature specifications

are representative of worst-case conditions. The

parameters included are common to popular designs and

typical applications.

The available device/package combinations are outlined in:

• Zynq-7000 All Programmable SoC Overview (DS190

)

• Defense-grade Zynq-7000Q All Programmable SoC

Overview (DS196

)

• XA Zynq-7000 All Programmable SoC Overview

(

DS188)

This Zynq-7000 AP SoC data sheet, which covers the

specifications for the XC7Z030, XA7Z030, XQ7Z030,

XC7Z035, XC7Z045, XQ7Z045, XC7Z100, and XQ7Z100

complements the Zynq-7000 AP SoC documentation suite

available on the Xilinx website at www.xilinx.com/zynq

DC Characteristics

Zynq-7000 All Programmable SoC

(Z-7030, Z-7035, Z-7045, and Z-7100):

DC and AC Switching Characteristics

DS191 (v1.18) April 12, 2017 Product Specification

Table 1: Absolute Maximum Ratings

(1)

Symbol Description Min Max Units

Processing System (PS)

CCPINT

PS internal logic supply voltage –0.5 1.1 V

CCPAUX

PS auxiliary supply voltage –0.5 2.0 V

CCPLL

PS PLL supply –0.5 2.0 V

CCO_DDR

PS DDR I/O supply –0.5 2.0 V

CCO_MIO

(2)

PS MIO I/O supply –0.5 3.6 V

PREF

PS input reference voltage –0.5 2.0 V

(2)(3)(4)(5)

PS MIO I/O input voltage –0.40 V

CCO_MIO

+0.55 V

PS DDR I/O input voltage –0.55 V

CCO_DDR

+0.55 V

Programmable Logic (PL)

CCINT

PL internal supply voltage

–0.5 1.1 V

CCBRAM

PL supply voltage for the block RAM memories

–0.5 1.1 V

CCAUX

PL auxiliary supply voltage

–0.5 2.0 V

CCO

PL output drivers supply voltage for HR I/O banks

–0.5 3.6 V

PL output drivers supply voltage for HP I/O banks

–0.5 2.0 V

CCAUX_IO

(4)

Auxiliary supply voltage

–0.5 2.06 V

Send Feedback

Zynq-7000 AP SoC (Z-7030, Z-7035, Z-7045, and Z-7100): DC and AC Switching Characteristics

DS191 (v1.18) April 12, 2017 www.xilinx.com

Product Specification 2

REF

Input reference voltage

–0.5 2.0 V

(3)(4)(5)

I/O input voltage for HR I/O banks –0.40 V

CCO

+0.55 V

I/O input voltage for HP I/O banks –0.55 V

CCO

+0.55 V

I/O input voltage (when V

CCO

= 3.3V) for V

REF

and differential I/O standards

except TMDS_33

(6)

–0.40 2.625 V

CCBATT

Key memory battery backup supply

–0.5 2.0 V

GTX Transceiver

MGTAVCC

Analog supply voltage for the GTX transmitter and receiver circuits –0.5 1.1 V

MGTAVTT

Analog supply voltage for the GTX transmitter and receiver termination circuits –0.5 1.32 V

MGTVCCAUX

Auxiliary analog Quad PLL (QPLL) voltage supply for the GTX transceivers –0.5 1.935 V

MGTREFCLK

GTX transceiver reference clock absolute input voltage –0.5 1.32 V

MGTAVTTRCAL

Analog supply voltage for the resistor calibration circuit of the GTX transceiver

column

–0.5 1.32 V

Receiver (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage –0.5 1.26 V

DCIN-FLOAT

DC input current for receiver input pins DC coupled RX termination = floating – 14 mA

DCIN-MGTAVTT

DC input current for receiver input pins DC coupled RX termination = V

MGTAVTT

–12mA

DCIN-GND

DC input current for receiver input pins DC coupled RX termination = GND – 6.5 mA

DCOUT-FLOAT

DC output current for transmitter pins DC coupled RX termination = floating – 14 mA

DCOUT-MGTAVTT

DC output current for transmitter pins DC coupled RX termination = V

MGTAVTT

–12mA

XADC

CCADC

XADC supply relative to GNDADC

–0.5 2.0 V

REFP

XADC reference input relative to GNDADC

–0.5 2.0 V

Temperature

STG

Storage temperature (ambient)

–65 150 °C

SOL

Maximum soldering temperature for Pb/Sn component bodies

(7)

– +220 °C

Maximum soldering temperature for Pb-free component bodies

(7)

– +260 °C

Maximum junction temperature

(7)

– +125 °C

Notes:

1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only,

and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.

Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.

2. Applies to both MIO supply banks V

CCO_MIO0

and V

CCO_MIO1

3. The lower absolute voltage specification always applies.

4. For I/O operation, refer to the 7 Series FPGAs SelectIO Resources User Guide (UG471

) or the Zynq-7000 All Programmable SoC Technical

Reference Manual (UG585

5. The maximum limit applies to DC signals. For maximum undershoot and overshoot AC specifications, see Table 4 and Table 5.

6. See Table 12 for TMDS_33 specifications.

7. For soldering guidelines and thermal considerations, see the Zynq-7000 All Programmable SoC Packaging and Pinout Specification

(UG865

Table 1: Absolute Maximum Ratings

(1)

(Cont’d)

Symbol Description Min Max Units

Send Feedback

Zynq-7000 AP SoC (Z-7030, Z-7035, Z-7045, and Z-7100): DC and AC Switching Characteristics

DS191 (v1.18) April 12, 2017 www.xilinx.com

Product Specification 3

Table 2: Recommended Operating Conditions

(1)(2)

Symbol Description Min Typ Max Units

CCPINT

(3)

PS internal logic supply voltage 0.95 1.00 1.05 V

CCPAUX

PS auxiliary supply voltage 1.71 1.80 1.89 V

CCPLL

PS PLL supply voltage 1.71 1.80 1.89 V

CCO_DDR

PS DDR supply voltage 1.14 – 1.89 V

CCO_MIO

(4)

PS supply voltage for MIO banks 1.71 – 3.465 V

(5)

PS DDR and MIO I/O input voltage –0.20 –

CCO_DDR

+ 0.20

CCO_MIO

+0.20

CCINT

(6)

PL internal supply voltage 0.97 1.00 1.03 V

PL -2LI (0.95V) internal supply voltage 0.93 0.95 0.97 V

CCBRAM

(6)

PL block RAM supply voltage 0.97 1.00 1.03 V

PL -2LI (0.95V) block RAM supply voltage 0.93 0.95 0.97 V

CCAUX

PL auxiliary supply voltage 1.71 1.80 1.89 V

CCO

(7)(8)

PL supply voltage for HR I/O banks 1.14 – 3.465 V

PL supply voltage for HP I/O banks 1.14 – 1.89 V

CCAUX_IO

(9)

PL auxiliary supply voltage when set to 1.8V 1.71 1.80 1.89 V

PL auxiliary supply voltage when set to 2.0V 1.94 2.00 2.06 V

(5)

I/O input voltage –0.20 – V

CCO

+0.20 V

I/O input voltage (when V

CCO

= 3.3V) for V

REF

and differential

I/O standards except TMDS_33

(10)

–0.20 – 2.625 V

(11)

Maximum current through any (PS or PL) pin in a powered or

unpowered bank when forward biasing the clamp diode

–– 10 mA

CCBATT

(12)

Battery voltage 1.0 – 1.89 V

GTX Transceiver

MGTAVCC

(13)

Analog supply voltage for the GTX transceiver QPLL frequency

range ≤ 10.3125 GHz

(14)(15)

0.97 1.0 1.08 V

Analog supply voltage for the GTX transceiver QPLL frequency

range > 10.3125 GHz

1.02 1.05 1.08

MGTAVTT

(13)

Analog supply voltage for the GTX transmitter and receiver

termination circuits

1.17 1.2 1.23 V

MGTVCCAUX

(13)

Auxiliary analog QPLL voltage supply for the transceivers 1.75 1.80 1.85 V

MGTAVTTRCAL

(13)

Analog supply voltage for the resistor calibration circuit of the

GTX transceiver column

1.17 1.2 1.23 V

XADC

CCADC

XADC supply relative to GNDADC 1.71 1.80 1.89 V

REFP

Externally supplied reference voltage 1.20 1.25 1.30 V

Send Feedback

Zynq-7000 AP SoC (Z-7030, Z-7035, Z-7045, and Z-7100): DC and AC Switching Characteristics

DS191 (v1.18) April 12, 2017 www.xilinx.com

Product Specification 4

Temperature

Junction temperature operating range for commercial (C)

temperature devices

0– 85 °C

Junction temperature operating range for extended (E)

temperature devices

0– 100 °C

Junction temperature operating range for industrial (I)

temperature devices

–40 – 100 °C

Junction temperature operating range for expanded (Q)

temperature devices

–40 – 125 °C

Notes:

1. All voltages are relative to ground. The PL and PS share a common ground.

2. For the design of the power distribution system consult the Zynq-7000 All Programmable SoC PCB Design Guide (UG933

3. When the processor cores operate F

CPU_6X4X_621_MAX

at 1 GHz (-3E speed grade) or when the DDR interface operates at 1333 Mb/s, the

CCPINT

minimum is 0.97V and the V

CCPINT

maximum is 1.03V.

4. Applies to both MIO supply banks V

CCO_MIO0

and V

CCO_MIO1

5. The lower absolute voltage specification always applies.

6. V

CCINT

and V

CCBRAM

should be connected to the same supply.

7. Configuration data is retained even if V

CCO

drops to 0V.

8. Includes V

CCO

of 1.2V, 1.35V, 1.5V, 1.8V, 2.5V (HR I/O only), and 3.3V (HR I/O only) at ±5%.

9. For more information, refer to the V

CCAUX_IO

section of the 7 Series FPGAs SelectIO Resources User Guide (UG471) or the Zynq-7000 All

Programmable SoC Technical Reference Manual (UG585

10. See Table 12 for TMDS_33 specifications.

11. A total of 200 mA per PS or PL bank should not be exceeded.

12. V

CCBATT

is required only when using bitstream encryption. If battery is not used, connect V

CCBATT

to either ground or V

CCAUX

13. Each voltage listed requires the filter circuit described in the 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476

14. For data rates ≤ 10.3125 Gb/s, V

MGTAVCC

should be 1.0V ±3% for lower power consumption.

15. For lower power consumption, V

MGTAVCC

should be 1.0V ±3% over the entire CPLL frequency range.

Table 2: Recommended Operating Conditions

(1)(2)

(Cont’d)

Symbol Description Min Typ Max Units

Send Feedback

剩余85页未读，继续阅读

评论收藏

内容反馈

半步成诗！

粉丝: 37
资源: 7

Xilinx Zynq-7000 SoC设备电气特性与参数详解

最新资源

Xilinx Zynq-7000 SoC设备电气特性与参数详解

Zynq-7000 SoC设计指南

ug585-Zynq-7000-TRM_SOC_zynq_

Zynq-7000 SoC.zip

Xilinx Zynq-7000 SoC高性能处理器，集成PS端双核ARM Cortex-A9 + PL端Kintex-7，PS端主频可高达1GHz .pdf

Xilinx_Zynq-7000 封装库

Xilinx Zynq-7000嵌入式系统设计与实现

Xilinx Zynq-7000.rar

Xilinx Zynq-7000 嵌入式系统设计与实现 基于ARM Cortex-A9双核处理器和Vivado的设计方法.rar

11213-34679-ug585-zynq-7000-trm.rar

Zynq-7000 AP SoC系列管脚分配

ZYNQ7000 参考技术手册

Zynq-7000 EPP Packaging and Pinout

ug585-Zynq-7000-TRM.pdf

zynq-7000 zc702 开发手册

zynq-7000-ucosii-demo-guide

ucos.rar_ucos zynq_zynq_zynq sdk_zynq ucos_zynq-7000

Zynq-7000零基础教程

ZYNQ 7000用户手册

【0积分免费下载】嵌入式各类项目大全100G

STM32CubeMx6.4.0版本+JRE安装包

Keil 找不到编译器 Missing:Complier Version5 的解决方法

ser2pl64.sys是电脑重要系统文件，主要用于串口转USB，描述：USB-to-Serial Cable Driver

KEIL5 常用stm32芯片包下载

嵌入式入门-ADS-安装包

Arm Compiler 5.06 update 7 (build 960) Lin32 -“官网最新版”Arm处理器的编译工具

Keil5.33的STLink文件

RK3588全套硬件设计资料

Compiler Version 5编译器

STM32CubeMx 6.1.1版本+JRE安装包

最新资源

Xilinx Zynq-7000 嵌入式系统设计与实现基于ARM Cortex-A9双核处理器和Vivado的设计方法.rar