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Type 2 Tag
Technical Specification
Version 1.1
2019-12-12
[T2T]
NFC Forum
TM
Copyright © 2017-2020 NFC Forum
Contents
Type 2 Tag Page ii
Contents
1 Introduction .................................................................................................... 1
1.1 Objectives and Scope .................................................................................................... 1
1.2 Applicable Documents or References ........................................................................... 2
1.3 Administration ............................................................................................................... 2
1.4 Name and Logo Usage .................................................................................................. 2
1.5 Intellectual Property ...................................................................................................... 3
1.6 Special Word Usage ...................................................................................................... 3
1.7 Notational Conventions ................................................................................................. 4
1.7.1 Notations ......................................................................................................... 4
1.8 Abbreviations ................................................................................................................ 5
1.9 Glossary ......................................................................................................................... 5
2 Radio Frequency (RF) Interface ................................................................... 9
3 Framing / Transmission Handling .............................................................. 10
3.1 Communication Protocol ............................................................................................. 10
3.2 Frame Structure ........................................................................................................... 10
3.2.1 Sequence Format........................................................................................... 10
3.2.2 Bit Level Coding ........................................................................................... 10
3.2.3 Frame Format ................................................................................................ 11
3.2.4 Data and Payload Format .............................................................................. 12
3.3 Activation Sequence .................................................................................................... 12
4 Memory Structure and Management .......................................................... 12
4.1 Memory Addressing .................................................................................................... 12
4.2 Memory Layout (informative) ..................................................................................... 15
4.3 Static and Dynamic Memory structures ...................................................................... 17
4.4 Internal Bytes .............................................................................................................. 18
4.5 Static Lock Bytes ......................................................................................................... 19
4.6 Capability Container (CC) ........................................................................................... 20
4.7 DynLock_Area for Defining Dynamic Lock bits ........................................................ 22
4.7.1 Default Setting for the Dynamic Lock bits ................................................... 22
4.8 Rsvd_Area ................................................................................................................... 24
4.9 Control TLVs .............................................................................................................. 25
4.9.1 Control TLV Structure .................................................................................. 25
4.9.2 List of Control TLVs for Type 2 Tag ........................................................... 25
4.9.3 TLVs_Area ................................................................................................... 26
4.9.4 Null TLV ...................................................................................................... 26
4.9.5 Lock Control TLV ........................................................................................ 27
4.9.6 Memory Control TLV ................................................................................... 30
4.9.7 NDEF Message TLV .................................................................................... 32
4.9.8 Terminator TLV ............................................................................................ 33
5 Command Set .............................................................................................. 34
5.1 Commands ................................................................................................................... 34
5.2 Read ............................................................................................................................. 34
5.3 Write ............................................................................................................................ 36
5.4 Sector Select ................................................................................................................ 37
5.5 ACK and NACK ......................................................................................................... 40
5.6 Timing Requirements .................................................................................................. 41
Contents
Type 2 Tag Page iii
5.7 Checking the Presence of a Type 2 Tag ...................................................................... 42
6 Type 2 Tag State Machine ........................................................................... 44
6.1 Type 2 Tag States ........................................................................................................ 44
6.1.1 IDLE State .................................................................................................... 44
6.1.2 READY_A State and READY_A* State ..................................................... 44
6.1.3 READY_A’ State and READY_A’* State ................................................... 44
6.1.4 READY_A” State and READY_A”* States ................................................ 45
6.1.5 T2T_ACTIVE and T2T_ACTIVE* States ................................................... 45
6.1.6 SECTOR_SELECT and SECTOR_SELECT* States .................................. 45
6.1.7 SLEEP_A State ............................................................................................. 46
7 NDEF Identification and Access ................................................................. 48
7.1 NDEF Identification .................................................................................................... 48
7.2 Version Treatment ....................................................................................................... 48
7.3 NDEF Storage ............................................................................................................. 48
7.4 Life Cycle .................................................................................................................... 48
7.4.1 Type 2 Tag States ......................................................................................... 48
7.4.2 INITIALIZED State ...................................................................................... 49
7.4.3 READ/WRITE State ..................................................................................... 50
7.4.4 READ-ONLY State ...................................................................................... 50
7.5 NDEF Procedures ........................................................................................................ 51
7.5.1 General Requirements ................................................................................... 51
7.5.2 Greedy Collection ......................................................................................... 51
7.5.3 NDEF Detection Procedure .......................................................................... 52
7.5.4 NDEF Read Procedure .................................................................................. 54
7.5.5 NDEF Write Procedure ................................................................................. 55
7.5.6 Single NDEF Read Operation ....................................................................... 59
7.5.7 Single NDEF Write Operation ...................................................................... 59
7.6 State Transitions .......................................................................................................... 59
7.6.1 Introduction ................................................................................................... 59
7.6.2 State Transitions Support .............................................................................. 60
7.6.3 Transition from INITIALIZED to READ/WRITE ....................................... 60
7.6.4 Transition from READ/WRITE to INITIALIZED ....................................... 60
7.6.5 Transition from READ/WRITE to READ-ONLY ....................................... 61
A. Exhibit A ....................................................................................................... 62
B. Type 2 Tag Timing ....................................................................................... 63
C. Empty NDEF Message ................................................................................. 64
C.1 NDEF Record for Empty NDEF Message .................................................................. 64
D. Memory Structure Examples ...................................................................... 65
D.1 Example of a Capability Container for a Type 2 Tag .................................................. 65
D.2 Example of a Static Memory Structure ....................................................................... 65
D.3 Example of a Dynamic Memory Structure .................................................................. 67
E. Examples of Static Memory Structures ..................................................... 69
E.1 Detection of NDEF Message ....................................................................................... 69
E.1.1 Positive Detection of NDEF Message .......................................................... 69
E.1.2 Negative Detection of NDEF Message ......................................................... 70
E.2 Read NDEF Message from the TLVs_Area ................................................................ 70
E.3 Write NDEF Message into the TLVs_Area ................................................................ 70
Contents
Type 2 Tag Page iv
E.3.1 First WRITE Command: Set L-field of NDEF Message TLV to 00h .......... 71
E.3.2 Next WRITE Commands: Write Remainder of the NDEF Message ............ 71
E.3.3 Next WRITE Command: Last Bytes NDEF Message, Terminator TLV ..... 72
E.3.4 Last WRITE Command: Set L-field of NDEF Message TLV ...................... 72
E.3.5 Expected Response for the WRITE Command ............................................ 73
F. Examples of Dynamic Memory Structures ................................................ 74
F.1 Detection of NDEF Message ....................................................................................... 74
F.1.1 Positive Detection of NDEF Message .......................................................... 74
F.1.2 Negative Detection of NDEF Message ......................................................... 75
F.2 Read NDEF Message from the TLVs_Area ................................................................ 75
F.3 Write NDEF Message into the TLVs_Area ................................................................ 76
F.3.1 READ Command to Read Content of Block 6 ............................................. 76
F.3.2 First WRITE Command: Set L-field of NDEF Message TLV to 00h .......... 77
F.3.3 Next WRITE Commands: Write Remainder of the NDEF Message ............ 78
F.3.4 Next WRITE Command: Terminator TLV ................................................... 78
F.3.5 Last WRITE Command: Set L-field of NDEF Message TLV ...................... 78
F.3.6 Expected Response for the WRITE Command ............................................ 79
G. Revision History .......................................................................................... 80
Figures
Type 2 Tag Page v
Figures
Figure 1: Type 2 Tag Memory Map and Addressing .................................................................... 13
Figure 2: Type 2 Tag Memory Map .............................................................................................. 15
Figure 3: Static and Dynamic Memory Structures ........................................................................ 18
Figure 4: Internal Bytes ................................................................................................................. 18
Figure 5: Static Lock Bytes ........................................................................................................... 19
Figure 6: Capability Container ...................................................................................................... 20
Figure 7: Examples of Default Settings for the Dynamic Lock Bits ............................................. 23
Figure 8: Length Field Formats ..................................................................................................... 25
Figure 9: Encoding of DynLock_Area .......................................................................................... 29
Figure 10: Type 2 Tag State Machine ........................................................................................... 47
Figure 11: NDEF Detection Procedure Flowchart ........................................................................ 52
Figure 12: NDEF Read Procedure Flowchart................................................................................ 54
Figure 13: NDEF Write Procedure Flowchart ............................................................................... 56
Figure 14: Life Cycle with State Transitions ................................................................................ 59
Figure 15: Example of Static Memory Structure ........................................................................... 65
Figure 16: Example of Dynamic Memory Structure ..................................................................... 67
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