K60 Sub-Family Reference Manual
Supports: MK60DN256ZVLQ10, MK60DX256ZVLQ10,
MK60DN512ZVLQ10, MK60DN256ZVMD10, MK60DX256ZVMD10,
MK60DN512ZVMD10
Document Number: K60P144M100SF2RM
Rev. 6, Nov 2011
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
2 Freescale Semiconductor, Inc.
Contents
Section Number Title Page
Chapter 1
About This Document
1.1 Overview.......................................................................................................................................................................57
1.1.1 Purpose.........................................................................................................................................................57
1.1.2 Audience......................................................................................................................................................57
1.2 Conventions..................................................................................................................................................................57
1.2.1 Numbering systems......................................................................................................................................57
1.2.2 Typographic notation...................................................................................................................................58
1.2.3 Special terms................................................................................................................................................58
Chapter 2
Introduction
2.1 Overview.......................................................................................................................................................................59
2.2 K60 Family Introduction...............................................................................................................................................59
2.3 Module Functional Categories......................................................................................................................................59
2.3.1 ARM Cortex-M4 Core Modules..................................................................................................................61
2.3.2 System Modules...........................................................................................................................................61
2.3.3 Memories and Memory Interfaces...............................................................................................................62
2.3.4 Clocks...........................................................................................................................................................63
2.3.5 Security and Integrity modules....................................................................................................................63
2.3.6 Analog modules...........................................................................................................................................64
2.3.7 Timer modules.............................................................................................................................................64
2.3.8 Communication interfaces...........................................................................................................................66
2.3.9 Human-machine interfaces..........................................................................................................................66
2.4 Orderable part numbers.................................................................................................................................................67
Chapter 3
Chip Configuration
3.1 Introduction...................................................................................................................................................................69
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Section Number Title Page
3.2 Core modules................................................................................................................................................................69
3.2.1 ARM Cortex-M4 Core Configuration..........................................................................................................69
3.2.2 Nested Vectored Interrupt Controller (NVIC) Configuration......................................................................72
3.2.3 Asynchronous Wake-up Interrupt Controller (AWIC) Configuration.........................................................78
3.2.4 JTAG Controller Configuration...................................................................................................................79
3.3 System modules............................................................................................................................................................80
3.3.1 SIM Configuration.......................................................................................................................................80
3.3.2 Mode Controller Configuration...................................................................................................................81
3.3.3 PMC Configuration......................................................................................................................................81
3.3.4 Low-Leakage Wake-up Unit (LLWU) Configuration.................................................................................82
3.3.5 MCM Configuration....................................................................................................................................84
3.3.6 Crossbar Switch Configuration....................................................................................................................84
3.3.7 Memory Protection Unit (MPU) Configuration...........................................................................................87
3.3.8 Peripheral Bridge Configuration..................................................................................................................89
3.3.9 DMA request multiplexer configuration......................................................................................................91
3.3.10 DMA Controller Configuration...................................................................................................................94
3.3.11 External Watchdog Monitor (EWM) Configuration....................................................................................95
3.3.12 Watchdog Configuration..............................................................................................................................96
3.4 Clock Modules..............................................................................................................................................................97
3.4.1 MCG Configuration.....................................................................................................................................97
3.4.2 OSC Configuration......................................................................................................................................98
3.4.3 RTC OSC configuration...............................................................................................................................99
3.5 Memories and Memory Interfaces................................................................................................................................99
3.5.1 Flash Memory Configuration.......................................................................................................................99
3.5.2 Flash Memory Controller Configuration.....................................................................................................103
3.5.3 SRAM Configuration...................................................................................................................................105
3.5.4 SRAM Controller Configuration.................................................................................................................108
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Section Number Title Page
3.5.5 System Register File Configuration.............................................................................................................108
3.5.6 VBAT Register File Configuration..............................................................................................................109
3.5.7 EzPort Configuration...................................................................................................................................110
3.5.8 FlexBus Configuration.................................................................................................................................111
3.6 Security.........................................................................................................................................................................114
3.6.1 CRC Configuration......................................................................................................................................114
3.6.2 MMCAU Configuration...............................................................................................................................115
3.6.3 RNG Configuration......................................................................................................................................116
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