################################################################################
# Vivado (TM) v2018.3 (64-bit)
#
# README.txt: Please read the sections below to understand the steps required
# to simulate the design for a simulator, the directory structure
# and the generated exported files.
#
################################################################################
1. Simulate Design
To simulate design, cd to the simulator directory and execute the script.
For example:-
% cd questa
% ./top.sh
The export simulation flow requires the Xilinx pre-compiled simulation library
components for the target simulator. These components are referred using the
'-lib_map_path' switch. If this switch is specified, then the export simulation
will automatically set this library path in the generated script and update,
copy the simulator setup file(s) in the exported directory.
If '-lib_map_path' is not specified, then the pre-compiled simulation library
information will not be included in the exported scripts and that may cause
simulation errors when running this script. Alternatively, you can provide the
library information using this switch while executing the generated script.
For example:-
% ./top.sh -lib_map_path /design/questa/clibs
Please refer to the generated script header 'Prerequisite' section for more details.
2. Directory Structure
By default, if the -directory switch is not specified, export_simulation will
create the following directory structure:-
<current_working_directory>/export_sim/<simulator>
For example, if the current working directory is /tmp/test, export_simulation
will create the following directory path:-
/tmp/test/export_sim/questa
If -directory switch is specified, export_simulation will create a simulator
sub-directory under the specified directory path.
For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
command will create the following directory:-
/tmp/test/my_test_area/func_sim/questa
By default, if -simulator is not specified, export_simulation will create a
simulator sub-directory for each simulator and export the files for each simulator
in this sub-directory respectively.
IMPORTANT: Please note that the simulation library path must be specified manually
in the generated script for the respective simulator. Please refer to the generated
script header 'Prerequisite' section for more details.
3. Exported script and files
Export simulation will create the driver shell script, setup files and copy the
design sources in the output directory path.
By default, when the -script_name switch is not specified, export_simulation will
create the following script name:-
<simulation_top>.sh (Unix)
When exporting the files for an IP using the -of_objects switch, export_simulation
will create the following script name:-
<ip-name>.sh (Unix)
Export simulation will create the setup files for the target simulator specified
with the -simulator switch.
For example, if the target simulator is "ies", export_simulation will create the
'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
file.
没有合适的资源?快使用搜索试试~ 我知道了~
基于黑金7020VIO控制DDS输出频率
共592个文件
txt:80个
v:63个
do:56个
需积分: 0 12 下载量 146 浏览量
2023-11-08
15:01:17
上传
评论
收藏 31.08MB RAR 举报
温馨提示
基于黑金7020VIO控制DDS输出频率
资源推荐
资源详情
资源评论
收起资源包目录
基于黑金7020VIO控制DDS输出频率 (592个子文件)
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
vio_dds.bit 3.86MB
vio_dds_routed.dcp 2.14MB
vio_dds_placed.dcp 1.9MB
vio_dds_opt.dcp 1.36MB
ila_0.dcp 666KB
ila_0.dcp 666KB
ila_0.dcp 665KB
dbg_hub.dcp 357KB
vio_0.dcp 109KB
vio_0.dcp 109KB
vio_0.dcp 109KB
dds_compiler_0.dcp 54KB
dds_compiler_0.dcp 54KB
dds_compiler_0.dcp 54KB
vio_dds.dcp 15KB
clk_wiz_0.dcp 9KB
clk_wiz_0.dcp 9KB
clk_wiz_0.dcp 9KB
compile.do 2KB
compile.do 2KB
compile.do 2KB
compile.do 2KB
compile.do 744B
compile.do 720B
compile.do 679B
compile.do 675B
compile.do 669B
compile.do 651B
compile.do 610B
compile.do 600B
simulate.do 478B
simulate.do 478B
simulate.do 478B
compile.do 416B
compile.do 402B
compile.do 376B
compile.do 370B
elaborate.do 350B
simulate.do 311B
simulate.do 306B
simulate.do 306B
simulate.do 303B
simulate.do 296B
simulate.do 294B
simulate.do 294B
simulate.do 287B
simulate.do 287B
simulate.do 205B
simulate.do 195B
simulate.do 187B
simulate.do 187B
elaborate.do 183B
elaborate.do 175B
elaborate.do 168B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 12B
wave.do 12B
wave.do 12B
wave.do 12B
simulate.do 11B
simulate.do 11B
simulate.do 11B
simulate.do 11B
run.f 1KB
run.f 1KB
run.f 462B
run.f 455B
run.f 446B
run.f 439B
run.f 171B
run.f 163B
usage_statistics_webtalk.html 189KB
hw_ila_data_1.ila 86KB
xsim.ini 22KB
xsim.ini 22KB
xsim.ini 22KB
xsim.ini 22KB
vivado.jou 806B
共 592 条
- 1
- 2
- 3
- 4
- 5
- 6
资源评论
星空lg
- 粉丝: 1133
- 资源: 10
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功