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JASPAR Standards Document: ST-CSP-14
Copyrights for this document belong to the General Incorporated Association JASPAR.
Unauthorized copying or reproduction is prohibited by copyright law.
Issued on December 11, 2020
Authored by Cybersecurity Promotion WG
General Incorporated
Association JASPAR
ST-CSP-14
JASPAR Cybersecurity -
Requirements Definition of Secure Boot Function
Ver.2.01
Requirements Definition of Secure Boot Function Ver. 2.01 JASPAR Standards Document: ST-CSP-14
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Unauthorized copying or reproduction is prohibited by copyright law.
JASPAR uses Japanese as its official language. This document is a translated version of the original Japanese one.
Please note that the Japanese version prevails on others for every difference in contents and/or interpretation among
them.
This English translation is for an informational purpose only and there is absolutely no guarantee regarding its
contents.
For your research and development purpose, always use the Japanese version as the reference.
Requirements Definition of Secure Boot Function Ver. 2.01 JASPAR Standards Document: ST-CSP-14
- 3 -
Unauthorized copying or reproduction is prohibited by copyright law.
Revision History
Date
Version
Details
2019/04/12
1.0
Newly created
2020/01/17
2.0
1. APPENDIX B.2: Updated the example sequence.
2. APPENDIX B.3: Added note when using a secure device.
3. Also corrected errors.
2020/12/11
2.01
・Added to the APPENDIX.C
・Updated 1.6 Notes on patent rights and 1.7 notes on copyrights
Requirements Definition of Secure Boot Function Ver. 2.01 JASPAR Standards Document: ST-CSP-14
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Unauthorized copying or reproduction is prohibited by copyright law.
Contents
1. Introduction ................................................................................................................................................6
1.1. Disclaimer ............................................................................................................................................................... 6
1.2. Objective of this document .................................................................................................................................... 6
1.3. Scope ....................................................................................................................................................................... 6
1.3.1. Definition of a secure boot and its overall system ....................................................................................... 6
1.3.2. Prerequisites for each area and its target range .......................................................................................... 7
1.4. Reference documents ............................................................................................................................................. 7
1.5. Description of terms ............................................................................................................................................... 9
1.6. Notes on patent rights .......................................................................................................................................... 11
1.7. Notes on copyright ............................................................................................................................................... 11
2. System overview of the ECU area ............................................................................................................... 12
2.1. System components of the ECU area .................................................................................................................. 12
2.2. Preparation function ............................................................................................................................................ 12
2.3. Verification function ............................................................................................................................................ 13
2.4. Response function ................................................................................................................................................ 14
2.5. Data storage area ................................................................................................................................................. 14
3. Functional requirements ............................................................................................................................ 14
3.1. List of functional requirements ........................................................................................................................... 15
3.1.1. Preparation function ................................................................................................................................... 15
3.1.2. Verification function .................................................................................................................................... 15
3.1.3. Response function ........................................................................................................................................ 16
3.1.4. Common to all of the ECU areas ................................................................................................................ 17
3.1.5. Verification algorithm ................................................................................................................................. 17
3.2. Individual functional requirements .................................................................................................................... 18
3.2.1. Preparation function ................................................................................................................................... 18
3.2.2. Verification function .................................................................................................................................... 20
3.2.3. Response function ........................................................................................................................................ 23
3.2.4. Common to all of the ECU areas ................................................................................................................ 24
3.2.5. Verification Algorithm ................................................................................................................................. 25
4. Implementation note .................................................................................................................................. 27
4.1. Preparation function ............................................................................................................................................ 27
4.2. Verification function ............................................................................................................................................ 27
4.3. Response function ................................................................................................................................................ 29
APPENIDIX.A (Reference): Types of LSI Memory and Allocation of Data Storage Area ....................................... 30
APPENIDIX.B (Reference): Note on Each Device Architecture ........................................................................... 33
B.1. One-chip microcontroller w/HSM EVITA-Medium .............................................................................................. 33
B.1.1. System configuration and prerequisites ........................................................................................................... 33
Requirements Definition of Secure Boot Function Ver. 2.01 JASPAR Standards Document: ST-CSP-14
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Unauthorized copying or reproduction is prohibited by copyright law.
B.1.2. List of Implementation Note ............................................................................................................................. 35
B.1.3. Individual Implementation Note ...................................................................................................................... 36
B.1.4. Example sequence .............................................................................................................................................. 44
B.2. SoC ............................................................................................................................................................................. 45
B.2.1. System configuration and prerequisites ........................................................................................................... 45
B.2.2. List of Implementation Note ............................................................................................................................. 48
B.2.3. Individual Implementation Note ...................................................................................................................... 50
B.2.4. Example sequence .............................................................................................................................................. 57
B.3. Secure device ............................................................................................................................................................. 62
B.3.1. List of Implementation Note ............................................................................................................................. 62
B.3.2. Individual Implementation Note ...................................................................................................................... 62
Appendix.C (Reference) .................................................................................................................................. 64
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