Cache_enable.zip_ADI_Blackfin_adi blackfin_blackfin cache _cache

/*****************************************************************************/ /***This program alternates blinking PF0/PF2 and PF1/PF3 using a delay loop***/ /***This program is written in C. */ /*****************************************************************************/ #include <sys/exception.h> #include <sys/excause.h> #include "def21535.h" #define DELAY_LOOP 0xFFFFF /*****************************************************************************/ /* */ /* to enable Cache (one CPLB for internal L2, cachable, */ /* one CPLB for SDRAM 0-4MByte, cachable) */ /* just include the next two lines */ /* */ /*****************************************************************************/ //#pragma retain_name // int __cplb_ctrl = 0x9; // 8+(1=Icache,2=dataA,4=dataAB) /*global variables*/ volatile unsigned short * fio_dir_reg; volatile unsigned short * fio_set_reg; volatile unsigned short * fio_clr_reg; /*function prototype*/ void delay(void); /*void main()*/ void main() { int i; /* setup the general purpose register first */ fio_dir_reg = (unsigned short *)FIO_DIR; fio_set_reg = (unsigned short *)FIO_FLAG_S; fio_clr_reg = (unsigned short *)FIO_FLAG_C; /* set PF0 - PF3 as output */ *fio_dir_reg = (unsigned short)0x000F; asm("ssync;"); for(i=0;i<10;i++) { /* clear all the LED */ *fio_set_reg = (unsigned short)0x000F; /* set LED to 0xAA pattern */ *fio_clr_reg = (unsigned short)0x000A; asm("ssync;"); delay(); /* clear all the LED */ *fio_set_reg = (unsigned short)0x000F; /* set LED to 0x5 pattern */ *fio_clr_reg = (unsigned short)0x0005; asm("ssync;"); delay(); } } /* simple delay routine */ void delay() { unsigned long i; for(i=0; i<DELAY_LOOP; i++) { asm("nop;nop;nop;nop;"); } return; }