Video_Output_c.rar_ADSP_Video_Output_c_bf561_mpeg4 dsp_output .m

/*****************************************************************************************/ // // Name: BF533 EZ-KIT video ITU-656 receive mode // /***************************************************************************************** (C) Copyright 2003 - Analog Devices, Inc. All rights reserved. File Name: Main.c Date Modified: 6/30/03 TL Rev 0.1 Software: VisualDSP++3.1 Hardware: BF533 EZ-KIT Board Special Connections: Connect a CVBS video source to the right bottom video jack "AVIN1" change switch #6 of SW3 to on of the ADSP-BF533 EZ-KIT Lite. Purpose: After reset the ADV7183 is configured to output digital video data in ITU656 mode 8bits wide. Additionally, The DSP is configured to receive video data in ITU-656 format via the PPI Interface. The DMA channel 0 is dedicated to transfer the data to the external SDRAM immediately (Address 0x0). ******************************************************************************************/ #include <cdefBF533.h> //BF533 Register Pointer Definition #include <stdio.h> #include <sys\exception.h> //Interrupt Handling Header // Sets up here all Prototyp Functions void Init_EBIU(void); void Init_Flash(void); void Init_ADV(void); void Init_Interrupts(void); void Init_SDRAM(void); void Init_DMA(void); void Init_PPI(void); void Init_PLL(void); void main() { int i = 0; //setup; Init_PLL(); Init_EBIU(); //Async Memory Interface Setup Init_Flash(); //Flash Setup to config the flash GPIOs //Init_ADV(); //Link the ADV7183 clock to the PPI and ADV7183 reset printf("\n ADV Setup Lock Delay!\n"); //Gives the ADV7183 time to lock after reset //Init_Interrupts(); //Enter an interrupt subroutine after DMA has been finished Init_SDRAM(); //SDRAM Setup to store the video image Init_DMA(); //DMA Setup "PPI->DMA->SDRAM" Its conigured in Sotp Mode Init_PPI(); //PPI Setup while (1) { i = 1; } }//end main