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Synopsys, Inc.
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2 Synopsys, Inc. September 2010
DesignWare DW_apb_timers Databook
September 2010 Synopsys, Inc. 11
DesignWare DW_apb_timers Databook Product Overview
SolvNet
DesignWare.com
1
Product Overview
The DW_apb_timers is a programmable timers peripheral. This component is an AMBA 2.0-compliant
Advanced Peripheral Bus (APB) slave device and is part of the family of DesignWare Synthesizable
Components.
1.1 DesignWare System Overview
The Synopsys DesignWare Synthesizable Components environment is a parameterizable bus system
containing AMBA version 2.0-compliant AHB (Advanced High-performance Bus) and APB (Advanced
Peripheral Bus) components, and AMBA version 3.0-compliant AXI (Advanced eXtensible Interface)
components.
Figure 1-1 illustrates one example of this environment, including the AXI bus, the AHB bus, and the APB
bus. Included in this subsystem are synthesizable IP for AXI/AHB/APB peripherals, bus bridges, and an
AXI interconnect and AHB bus fabric. Also included are verification IP for AXI/AHB/APB master/slave
models and bus monitors.
Attention
12 Synopsys, Inc. September 2010
Product Overview DesignWare DW_apb_timers Databook
SolvNet
DesignWare.com
Figure 1-1 Example of DW_apb_timers in a Complete System
apb_monitor_vmt
DW_ahb (2)
DW_ahb_icm
DW_ahb_h2h,
DW_ahb_eh2h
Application-
Specific
Third-party
Peripherals
Logic
Application-
Specific
Logic
High-speed
USB, Ethernet,
PCI-X, and so on
Peripherals
DW_ahb
DW_ahb
Arbitration,
Decode, & Mux
Third-party
Peripherals
DW_ahb_dmac
APB Slave
VIP
AHB
VIP
Master/Slave
Third-party
Master
Third-party
Slave
DW_axi_gm DW_axi_gs
DW_ahb
DW_axi
Arbitration,
Decode, & Mux
axi_monitor_vmt
– Synopsys components – 3rd-party components
Third-party
Master/Slave
DW_axi_rs
Third-party
Master/Slave
AXI
VIP
Master/Slave
DW_ahb_eh2h
DW_axi_hmx
DW_axi_x2p
AMBA 3 Bridge
DW_apb_uart DW_apb_i2c
…
ahb_monitor_vmt
DW_memctl DW_ahb_dmacDW_ahb_ictl
RAM
Memory Models
DW_axi_x2h
Third-party
Slave
DW_axi_x2x
AMBA 3 Bridge
DW_ahb
DW_apb AHB/APB Bridge
DW_apb_ictl
DW_apb_rtc
DW_apb_uart
DW_apb_ssi
DW_apb_rap DW_apb_timers
DW_apb_wdtDW_apb_gpio
DW_apb_i2c
DW_apb_i2s
September 2010 Synopsys, Inc. 13
DesignWare DW_apb_timers Databook Product Overview
SolvNet
DesignWare.com
1.2 General Product Description
The Synopsys DW_apb_timers is a component of the DesignWare Advanced Peripheral Bus (DW_apb).
1.2.1 DW_apb_timers Block Diagram
Figure 1-2 shows the block diagram of the DW_apb_timers.
Figure 1-2 DW_apb_timers Block Diagram
1.3 Features
DW_apb_timers has the following features:
❖ Up to eight programmable timers
❖ Configurable timer width: 8 to 32 bits
❖ Support for two operation modes: free-running and user-defined count
❖ Support for independent clocking of timers
❖ Configurable polarity for each individual interrupt
❖ Configurable option for a single or combined interrupt output flag
❖ Configurable option to have read/write coherency registers for each timer
❖ Configurable option to include timer toggle output, which toggles whenever timer counter reloads
Source code for this component is available on a per-project basis as a DesignWare Core. Please contact your
local sales office for the details.
DW_apb_timers
Timer1
TimerN*
Timer2
*
N <= 8
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