PSoC TRM
CY8C29x66, CY8C27x43,
CY8C24x94, CY8C24x23, CY8C24x23A,
CY8C22x13, CY8C21x34, CY8C21x23,
CY7C64215, CY7C603xx, and CYWUSB6953
PSoC
®
Mixed Signal Array
Technical Reference Manual (TRM)
PSoC TRM, Version 2.10
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl.): 408.943.2600
http://www.cypress.com
2 PSoC TRM, Version 2.10
Copyrights
Copyrights
Copyright © 2005 - 2006 Cypress Semiconductor Corporation. All rights reserved.
PSoC® is a registered trademark and PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trade-
marks of Cypress Semiconductor Corporation (Cypress), along with Cypress® and Cypress Semiconductor™. All other
trademarks or registered trademarks referenced herein are the property of their respective owners.
The information in this document is subject to change without notice and should not be construed as a commitment by
Cypress. While reasonable precautions have been taken, Cypress assumes no responsibility for any errors that may appear
in this document. No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of Cypress. Made in the U.S.A.
Disclaimer
CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PAR-
TICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein.
Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress
does not authorize its products for use as critical components in life-support systems where a malfunction or failure may rea-
sonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems appli-
cation implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Flash Code Protection
Cypress products meet the specifications contained in their particular Cypress PSoC Data Sheets. Cypress believes that its
family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used.
There may be methods, unknown to Cypress, that can breach the code protection features. Any of these methods, to our
knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can guaran-
tee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly
evolving. We at Cypress are committed to continuously improving the code protection features of our products.
PSoC TRM, Version 2.10 3
Contents Overview
Section A: Overview 19
1. Pin Information.................................................................................................................... 29
Section B: PSoC Core 57
2. CPU Core (M8C) ................................................................................................................. 61
3. Supervisory ROM (SROM)...................................................................................................71
4. RAM Paging........................................................................................................................ 81
5. Interrupt Controller .............................................................................................................. 89
6. General Purpose IO (GPIO).................................................................................................97
7. Analog Output Drivers ....................................................................................................... 103
8. Internal Main Oscillator (IMO)............................................................................................ 105
9. Internal Low Speed Oscillator (ILO) ................................................................................... 109
10. External Crystal Oscillator (ECO)........................................................................................111
11. Phase-Locked Loop (PLL) ................................................................................................. 117
12. Sleep and Watchdog ......................................................................................................... 121
Section C: Register Reference 133
13. Register Details................................................................................................................. 139
Section D: Digital System 297
14. Global Digital Interconnect (GDI) ....................................................................................... 303
15. Array Digital Interconnect (ADI) ......................................................................................... 315
16. Row Digital Interconnect (RDI) .......................................................................................... 317
17. Digital Blocks .................................................................................................................... 325
Section E: Analog System 361
18. Analog Interface................................................................................................................ 367
19. Analog Array ..................................................................................................................... 383
20. Analog Input Configuration ................................................................................................ 391
21. Analog Reference ............................................................................................................. 399
22. Continuous Time PSoC Block ............................................................................................ 403
23. Switched Capacitor PSoC Block ........................................................................................ 409
24. Two Column Limited Analog System .................................................................................. 419
Section F: System Resources 439
25. Digital Clocks .................................................................................................................... 443
26. Multiply Accumulate (MAC)................................................................................................ 453
27. Decimator ......................................................................................................................... 459
28. I2C ................................................................................................................................... 465
4 PSoC TRM, Version 2.10
Contents Overview
29. Internal Voltage Reference................................................................................................ 481
30. System Resets.................................................................................................................. 483
31. Switch Mode Pump (SMP)................................................................................................. 489
32. POR and LVD ................................................................................................................... 493
33. IO Analog Multiplexer........................................................................................................ 495
34. Full-Speed USB ................................................................................................................ 501
Section G: Glossary 515
Index 531
PSoC TRM, Version 2.10 5
Contents
Section A: Overview 19
Document Organization ......................................................................................................................19
Top-Level Architecture ........................................................................................................................20
PSoC Core ................................................................................................................................20
Digital System ............................................................................................................................20
Analog System ..........................................................................................................................20
System Resources ....................................................................................................................20
PSoC Device Characteristics ..............................................................................................................22
PSoC Device Distinctions ...................................................................................................................23
Getting Started ...................................................................................................................................24
Support ......................................................................................................................................24
Product Upgrades ......................................................................................................................24
Development Kits .....................................................................................................................24
Document History ................................................................................................................................25
Documentation Conventions ..............................................................................................................26
Register Conventions ..............................................................................................................26
Numeric Naming .......................................................................................................................26
Units of Measure ....................................................................................................................26
Acronyms ..................................................................................................................................27
1. Pin Information..................................................................................................................29
1.1 Pinouts ......................................................................................................................................29
1.1.1 8-Pin Part Pinouts ......................................................................................................29
1.1.2 16-Pin Part Pinout.......................................................................................................30
1.1.3 20-Pin Part Pinouts .....................................................................................................31
1.1.4 24-Pin Part Pinout.......................................................................................................32
1.1.5 28-Pin Part Pinouts .....................................................................................................33
1.1.6 32-Pin Part Pinouts .....................................................................................................35
1.1.7 44-Pin Part Pinout.......................................................................................................37
1.1.8 48-Pin Part Pinouts .....................................................................................................38
1.1.9 56-Pin Part Pinouts .....................................................................................................41
1.1.10 68-Pin Part Pinouts .....................................................................................................45
1.1.11 100-Pin Part Pinouts ...................................................................................................47
1.1.12 100-Ball VFBGA Part Pinouts .....................................................................................53
Section B: PSoC Core 57
Top-Level Core Architecture ................................................................................................................57
Interpreting the Core Documentation ...................................................................................................57
Core Register Summary ......................................................................................................................58