spi.rar_C5505 codes_DSP spi_c5505_spi_spi dsp

/* ============================================================================ * Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2008 * * Use of this software is controlled by the terms and conditions found in the * license agreement under which this software has been supplied. * ============================================================================ */ /** @file csl_spi_exampale.c * * @brief I2S functional layer sample source file * * Path: \(CSLPATH)\example\spi\src */ /* ============================================================================ * Revision History * ================ * 09-Sept-2008 Created * ============================================================================ */ #include "csl_spi.h" #include <stdio.h> #define CSL_TEST_FAILED (1) #define CSL_TEST_PASSED (0) #define CSL_SPI_BUF_LEN (64) #define SPI_CLK_DIV (8) #define SPI_FRAME_LENGTH (1) Uint16 spiWriteBuff[CSL_SPI_BUF_LEN]; Uint16 spiReadBuff[CSL_SPI_BUF_LEN]; Uint16 byteBuf[1]; Uint16 cmdBuffer[3] = {0, 0, 0}; Int16 spi_sample(void) { Int16 status = CSL_TEST_FAILED; Int16 result; CSL_SpiHandle hSpi; SPI_Config hwConfig; Uint16 looper; Uint16 value = 0; Uint16 pageNo = 0x0000; Uint16 pollStatus; Uint16 delay; Uint16 fnCnt; result = SPI_init(); if(CSL_SOK != result) { status = CSL_TEST_FAILED; return (status); } else { printf ("SPI Instance Intialize successfully\n"); } hSpi = SPI_open(SPI_CS_NUM_0, SPI_POLLING_MODE); if(NULL == hSpi) { return (CSL_TEST_FAILED); } else { printf ("SPI Instance Opened successfully\n"); } /** Set the hardware configuration */ hwConfig.spiClkDiv = SPI_CLK_DIV; hwConfig.wLen = SPI_WORD_LENGTH_8; hwConfig.frLen = SPI_FRAME_LENGTH; hwConfig.wcEnable = SPI_WORD_IRQ_ENABLE; hwConfig.fcEnable = SPI_FRAME_IRQ_DISABLE; hwConfig.csNum = SPI_CS_NUM_0; hwConfig.dataDelay = SPI_DATA_DLY_0; hwConfig.csPol = SPI_CSP_ACTIVE_LOW; hwConfig.clkPol = SPI_CLKP_LOW_AT_IDLE; hwConfig.clkPh = SPI_CLK_PH_FALL_EDGE; result = SPI_config(hSpi, &hwConfig); if(CSL_SOK != result) { return (CSL_TEST_FAILED); } else { printf ("SPI Instance Configured successfully\n"); } /****************************************************************************/ /** This configuration for the EPROM*/ do { /* Check for bsy status */ value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_BSY); }while(value & 0x01==1); CSL_FINS(CSL_SPI_REGS->SPICMD1,SPI_SPICMD1_FLEN,1); /* set one word */ /* Send Read Status Command */ CSL_FINS(CSL_SPI_REGS->SPIDR2,SPI_SPIDR2_DATA,0x0500); CSL_FINS(CSL_SPI_REGS->SPIDR1,SPI_SPIDR1_DATA,0x0); /* set start CMD - Read */ CSL_FINS(CSL_SPI_REGS->SPICMD2,SPI_SPICMD2_CMD,CSL_SPI_SPICMD2_CMD_READ); do { /* Check for Word Complete status */ value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_CC); }while(value & 0x02==0); do { /* Check for bsy status */ value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_BSY); }while(value & 0x01==1); //Read the Status --- Dummy clock cycles CSL_FINS(CSL_SPI_REGS->SPIDR2,SPI_SPIDR2_DATA,0x0); CSL_FINS(CSL_SPI_REGS->SPICMD2,SPI_SPICMD2_CMD,0x01); do { /* Check for Word Complete status */ value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_CC); }while(value & 0x02==0); do { /* Check for bsy status */ value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_BSY); }while(value & 0x01==1); // Enable write using WREN command CSL_FINS(CSL_SPI_REGS->SPICMD1,SPI_SPICMD1_FLEN,0x0); /* Write Enable command */ CSL_FINS(CSL_SPI_REGS->SPIDR2,SPI_SPIDR2_DATA,0x0600); CSL_FINS(CSL_SPI_REGS->SPIDR1,SPI_SPIDR1_DATA,0x0000); /* set start CMD - Write */ CSL_FINS(CSL_SPI_REGS->SPICMD2,SPI_SPICMD2_CMD,0x02); do { /* Check for Word Complete status */ value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_CC); }while(value & 0x02==0); do { /* Check for bsy status */ value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_BSY); }while(value & 0x01==1); cmdBuffer[0] = 0x02; /* eeprom address - MSB */ cmdBuffer[1] = (pageNo >> 0x08); /* eeprom address - LSB */ cmdBuffer[2] = (pageNo & 0xFF); CSL_FINS(CSL_SPI_REGS->SPICMD1,SPI_SPICMD1_FLEN, CSL_SPI_BUF_LEN+3-1); /* Set Command for write */ for(fnCnt = 0; fnCnt < 3; fnCnt++) { CSL_SPI_REGS->SPIDR2 = (Uint16)(cmdBuffer[fnCnt] <<0x08); CSL_SPI_REGS->SPIDR1 = 0x0000; CSL_SPI_REGS->SPICMD2 = (((CSL_SPI_REGS->SPICMD2) & (Uint16)(~CSL_SPI_SPICMD2_CMD_MASK)) | ((Uint16)(2 << CSL_SPI_SPICMD2_CMD_SHIFT))); do { pollStatus = (CSL_SPI_REGS->SPISTAT1); }while(((pollStatus & 0x02) != 0x01) && ((pollStatus & 0x01) == 0x01)); } /****************************************************************************/ byteBuf[0] = 0xABCD; for(looper = 0; looper < 64; ) { spiWriteBuff[looper] = 0x0011; spiWriteBuff[(looper + 1)] = 0x00AB; spiReadBuff[looper] = 0x0000; spiReadBuff[(looper + 1)] = 0x00CD; looper += 2; } result = SPI_dataTransaction(hSpi ,spiWriteBuff, CSL_SPI_BUF_LEN, SPI_WRITE); if(CSL_SOK != result) { return (CSL_TEST_FAILED); } else { printf ("SPI Instance Write successfully\n"); } /******************************************************************************/ for (delay = 0; delay < 35000; delay++) { /* no operation */ } /* Configure the SPI for read from EEprom */ /* read command */ cmdBuffer[0] = 0x03; /* eeprom address - MSB */ cmdBuffer[1] = (pageNo >> 0x08); /* eeprom address - LSB */ cmdBuffer[2] = (pageNo & 0xFF); CSL_FINS(CSL_SPI_REGS->SPICMD1,SPI_SPICMD1_FLEN, CSL_SPI_BUF_LEN+3-1); /* Set Command for write */ for(fnCnt = 0; fnCnt < 3; fnCnt++) { CSL_SPI_REGS->SPIDR2 = (Uint16)(cmdBuffer[fnCnt] <<0x08); CSL_SPI_REGS->SPIDR1 = 0x0000; CSL_SPI_REGS->SPICMD2 = (((CSL_SPI_REGS->SPICMD2) & (Uint16)(~CSL_SPI_SPICMD2_CMD_MASK)) | ((Uint16)(2 << CSL_SPI_SPICMD2_CMD_SHIFT))); do { pollStatus = (CSL_SPI_REGS->SPISTAT1); }while(((pollStatus & 0x02) != 0x01) && ((pollStatus & 0x01) == 0x01)); } /******************************************************************************/ result = SPI_dataTransaction(hSpi ,spiReadBuff, CSL_SPI_BUF_LEN, SPI_READ); if(CSL_SOK != result) { return (CSL_TEST_FAILED); } else { printf ("SPI Instance Read successfully\n"); } result = SPI_deInit(); if(CSL_SOK != result) { return (CSL_TEST_FAILED); } else { printf ("SPI Instance deIntialize successfully\n"); } result = SPI_close(hSpi); if(CSL_SOK != result) { return (CSL_TEST_FAILED); } else { printf ("SPI Instance Close successfully\n"); } for(looper=0; looper < 64; looper++) { if(spiReadBuff[looper] != spiWriteBuff[looper]) { status = CSL_TEST_FAILED; break; } else { status = CSL_TEST_PASSED; } } if(status == CSL_TEST_PASSED) { printf ("SPI Writen & Read buffer matching\n"); } return (status); } void main(void) { Int16 status; status = spi_sample(); if(status != CSL_TEST_PASSED) { printf("SPI Sample Test Failed!!\n"); } else { printf("SPI Sample Test Passed!!\n"); } }