library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity ledblink is
Port ( sw : in STD_LOGIC;
led : out STD_LOGIC);
end ledblink;
architecture Behavioral of ledblink is
begin
end Behavioral;
