mux.rar_Table

/* * linux/arch/arm/mach-omap1/mux.c * * OMAP1 pin multiplexing configurations * * Copyright (C) 2003 - 2008 Nokia Corporation * * Written by Tony Lindgren * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ #include <linux/module.h> #include <linux/init.h> #include <linux/io.h> #include <linux/spinlock.h> #include <mach/hardware.h> #include <mach/mux.h> #ifdef CONFIG_OMAP_MUX static struct omap_mux_cfg arch_mux_cfg; #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) static struct pin_config __initdata_or_module omap7xx_pins[] = { MUX_CFG_7XX("E2_7XX_KBR0", 12, 21, 0, 20, 1, 0) MUX_CFG_7XX("J7_7XX_KBR1", 12, 25, 0, 24, 1, 0) MUX_CFG_7XX("E1_7XX_KBR2", 12, 29, 0, 28, 1, 0) MUX_CFG_7XX("F3_7XX_KBR3", 13, 1, 0, 0, 1, 0) MUX_CFG_7XX("D2_7XX_KBR4", 13, 5, 0, 4, 1, 0) MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0) MUX_CFG_7XX("D3_7XX_KBC1", 13, 13, 0, 12, 1, 0) MUX_CFG_7XX("E4_7XX_KBC2", 13, 17, 0, 16, 1, 0) MUX_CFG_7XX("F4_7XX_KBC3", 13, 21, 0, 20, 1, 0) MUX_CFG_7XX("E3_7XX_KBC4", 13, 25, 0, 24, 1, 0) MUX_CFG_7XX("AA17_7XX_USB_DM", 2, 21, 0, 20, 0, 0) MUX_CFG_7XX("W16_7XX_USB_PU_EN", 2, 25, 0, 24, 0, 0) MUX_CFG_7XX("W17_7XX_USB_VBUSI", 2, 29, 6, 28, 1, 0) MUX_CFG_7XX("W18_7XX_USB_DMCK_OUT",3, 3, 1, 2, 0, 0) MUX_CFG_7XX("W19_7XX_USB_DCRST", 3, 7, 1, 6, 0, 0) /* MMC Pins */ MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0) MUX_CFG_7XX("MMC_7XX_CLK", 2, 13, 0, 12, 1, 0) MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0) /* I2C interface */ MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) /* SPI pins */ MUX_CFG_7XX("SPI_7XX_1", 6, 5, 4, 4, 1, 0) MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0) MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) /* UART pins */ MUX_CFG_7XX("UART_7XX_1", 3, 21, 0, 20, 0, 0) MUX_CFG_7XX("UART_7XX_2", 8, 1, 6, 0, 0, 0) }; #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) #else #define omap7xx_pins NULL #define OMAP7XX_PINS_SZ 0 #endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) static struct pin_config __initdata_or_module omap1xxx_pins[] = { /* * description mux mode mux pull pull pull pu_pd pu dbg * reg offset mode reg bit ena reg */ MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0) MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0) /* UART2 (COM_UART_GATING), conflicts with USB2 */ MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0) MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0) MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0) MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0) /* UART3 (GIGA_UART_GATING) */ MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0) MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0) MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0) MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0) MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0) MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0) MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0) /* PWT & PWL, conflicts with UART3 */ MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0) MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0) /* USB internal master generic */ MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1) MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1) /* works around erratum: W4_USB_PUEN and W4_USB_PUDIS are switched! */ MUX_CFG("W4_USB_PUEN", D, 3, 3, 3, 5, 1, NA, 0, 1) MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1) MUX_CFG("W4_USB_HIGHZ", D, 3, 4, 3, 5, 0, 3, 0, 1) MUX_CFG("W4_GPIO58", D, 3, 7, 3, 5, 0, 3, 0, 1) /* USB1 master */ MUX_CFG("USB1_SUSP", 8, 27, 2, 1, 27, 0, NA, 0, 1) MUX_CFG("USB1_SE0", 9, 0, 2, 1, 28, 0, NA, 0, 1) MUX_CFG("W13_1610_USB1_SE0", 9, 0, 4, 1, 28, 0, NA, 0, 1) MUX_CFG("USB1_TXEN", 9, 3, 2, 1, 29, 0, NA, 0, 1) MUX_CFG("USB1_TXD", 9, 24, 1, 2, 4, 0, NA, 0, 1) MUX_CFG("USB1_VP", A, 3, 1, 2, 7, 0, NA, 0, 1) MUX_CFG("USB1_VM", A, 6, 1, 2, 8, 0, NA, 0, 1) MUX_CFG("USB1_RCV", A, 9, 1, 2, 9, 0, NA, 0, 1) MUX_CFG("USB1_SPEED", A, 12, 2, 2, 10, 0, NA, 0, 1) MUX_CFG("R13_1610_USB1_SPEED", A, 12, 5, 2, 10, 0, NA, 0, 1) MUX_CFG("R13_1710_USB1_SEO", A, 12, 5, 2, 10, 0, NA, 0, 1) /* USB2 master */ MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1) MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1) MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1) MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1) MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1) MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1) MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1) /* OMAP-1510 GPIO */ MUX_CFG("R18_1510_GPIO0", 7, 9, 0, 1, 11, 1, 0, 0, 1) MUX_CFG("R19_1510_GPIO1", 7, 6, 0, 1, 10, 1, 0, 0, 1) MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1) /* OMAP1610 GPIO */ MUX_CFG("P18_1610_GPIO3", 7, 0, 0, 1, 8, 0, NA, 0, 1) MUX_CFG("Y15_1610_GPIO17", A, 0, 7, 2, 6, 0, NA, 0, 1) /* OMAP-1710 GPIO */ MUX_CFG("R18_1710_GPIO0", 7, 9, 0, 1, 11, 1, 1, 1, 1) MUX_CFG("V2_1710_GPIO10", F, 27, 1, 4, 3, 1, 4, 1, 1) MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1) MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1) /* MPUIO */ MUX_CFG("MPUIO2", 7, 18, 0, 1, 14, 1, NA, 0, 1) MUX_CFG("N15_1610_MPUIO2", 7, 18, 0, 1, 14, 1, 1, 0, 1) MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1) MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1) MUX_CFG("T20_1610_MPUIO5", 7, 12, 0, 1, 12, 0, 3, 0, 1) MUX_CFG("W11_1610_MPUIO6", 10, 15, 2, 3, 8, 0, 3, 0, 1) MUX_CFG("V10_1610_MPUIO7", A, 24, 2, 2, 14, 0, 2, 0, 1) MUX_CFG("W11_1610_MPUIO9", 10, 15, 1, 3, 8, 0, 3, 0, 1) MUX_CFG("V10_1610_MPUIO10", A, 24, 1, 2, 14, 0, 2, 0, 1) MUX_CFG("W10_1610_MPUIO11", A, 18, 2, 2, 11, 0, 2, 0, 1) MUX_CFG("E20_1610_MPUIO13", 3, 21, 1, 0, 7, 0, 0, 0, 1) MUX_CFG("U20_1610_MPUIO14", 9, 6, 6, 0, 30, 0, 0, 0, 1) MUX_CFG("E19_1