mux.rar_floor5E5_mux_noong5v_result44m资源-CSDN文库

共44个文件

html：5个

prj：5个

sdb：4个

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179 浏览量 2022-09-24 23:37:23 上传评论收藏 44KB RAR 举报

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mux.rar （44个子文件）

mux

xst

projnav.tmp

dump.xst

mux4test.prj

mux4_1.prj

work

work.sdbl 3KB

work.sdbx 84B

mux2_1_stx_beh.prj 97B

mux4_1.ngr 2KB

mux4test_summary.html 4KB

mux4test_stx_beh.prj 97B

mux4_1_stx_beh.prj 127B

iseconfig

mux.projectmgr 7KB

mux2_1.xreport 20KB

mux4_1.xreport 20KB

mux4_1_xst.xrpt 11KB

mux4test_xst.xrpt 10KB

mux4test_envsettings.html 9KB

mux4test.xst 1KB

mux4_1.v 475B

_xmsgs

xst.xmsgs 367B

pn_parser.xmsgs 749B

mux2_1_summary.html 4KB

mux4_1.cmd_log 212B

ipcore_dir

mux4_1.syr 10KB

mux4test.cmd_log 220B

mux.xise 36KB

mux4test.prj 50B

mux4_1.ngc 2KB

mux4_1.lso 6B

mux4test.syr 10KB

mux4test.ngr 614B

isim

temp

mux4_1.sdb 1KB

mux4test.sdb 2KB

glbl.sdb 4KB

mux2_1.sdb 874B

xilinxsim.ini 21B

mux.gise 7KB

webtalk_pn.xml 3KB

mux4test.stx 0B

mux2_1.v 124B

mux4test.ngc 697B

mux4_1.stx 0B

mux4_1.xst 1KB

mux4_1.prj 25B

mux4_1_summary.html 5KB

mux4_1_envsettings.html 9KB

fuse.xmsgs 367B

mux4test.lso 6B

<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD> <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'> <center><big><big>System Settings</big></big></center> <A NAME="Environment Settings"></A>   <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> <TD ALIGN=CENTER COLSPAN='5'> Environment Settings </TD> </tr> <tr bgcolor='#ffff99'> <td>Environment Variable</td> <td>xst</td> <td>ngdbuild</td> <td>map</td> <td>par</td> </tr> <tr> <td>PATHEXT</td> <td>.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>Path</td> <td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt; C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt; C:\Xilinx\14.7\ISE_DS\ISE\bin\nt; C:\Xilinx\14.7\ISE_DS\ISE\lib\nt; C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav; C:\Xilinx\14.7\ISE_DS\PlanAhead\bin; C:\Xilinx\14.7\ISE_DS\EDK\bin\nt; C:\Xilinx\14.7\ISE_DS\EDK\lib\nt; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_be\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_le\bin; C:\Xilinx\14.7\ISE_DS\common\bin\nt; C:\Xilinx\14.7\ISE_DS\common\lib\nt; C:\ProgramData\Oracle\Java\javapath; C:\Program Files\Common Files\NetSarang; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\MATLAB\R2014a\runtime\win32; C:\Program Files\MATLAB\R2014a\bin; C:\Program Files\MATLAB\R2014a\polyspace\bin; C:\Program Files\Vim\vim74; C:\Program Files\Notepad++; C:\questasim_10.1d\win32; C:\emacs-24.3\bin</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX</td> <td>C:\Xilinx\14.7\ISE_DS\ISE\</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINXD_LICENSE_FILE</td> <td>2100@192.168.72.10</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX_DSP</td> <td>C:\Xilinx\14.7\ISE_DS\ISE</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX_EDK</td> <td>C:\Xilinx\14.7\ISE_DS\EDK</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX_PLANAHEAD</td> <td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> </TABLE> <A NAME="Synthesis Property Settings"></A>   <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> <TD ALIGN=CENTER COLSPAN='4'>Synthesis Property Settings </TD> </tr> <tr bgcolor='#ffff99'> <td>Switch Name</td> <td>Property Name</td> <td>Value</td> <td>Default Value</td> </tr> <tr> <td>-ifn</td> <td> </td> <td>mux4test.prj</td> <td> </td> </tr> <tr> <td>-ofn</td> <td> </td> <td>mux4test</td> <td> </td> </tr> <tr> <td>-ofmt</td> <td> </td> <td>NGC</td> <td>NGC</td> </tr> <tr> <td>-p</td> <td> </td> <td>xc6slx4-3-tqg144</td> <td> </td> </tr> <tr> <td>-top</td> <td> </td> <td>mux4test</td> <td> </td> </tr> <tr> <td>-opt_mode</td> <td>Optimization Goal</td> <td>Speed</td> <td>Speed</td> </tr> <tr> <td>-opt_level</td> <td>Optimization Effort</td> <td>1</td> <td>1</td> </tr> <tr> <td>-power</td> <td>Power Reduction</td> <td>NO</td> <td>No</td> </tr> <tr> <td>-iuc</td> <td>Use synthesis Constraints File</td> <td>NO</td> <td>No</td> </tr> <tr> <td>-keep_hierarchy</td> <td>Keep Hierarchy</td> <td>No</td> <td>No</td> </tr> <tr> <td>-netlist_hierarchy</td> <td>Netlist Hierarchy</td> <td>As_Optimized</td> <td>As_Optimized</td> </tr> <tr> <td>-rtlview</td> <td>Generate RTL Schematic</td> <td>Yes</td> <td>No</td> </tr> <tr> <td>-glob_opt</td> <td>Global Optimization Goal</td> <td>AllClockNets</td> <td>AllClockNets</td> </tr> <tr> <td>-read_cores</td> <td>Read Cores</td> <td>YES</td> <td>Yes</td> </tr> <tr> <td>-write_timing_constraints</td> <td>Write Timing Constraints</td> <td>NO</td> <td>No</td> </tr> <tr> <td>-cross_clock_analysis</td> <td>Cross Clock Analysis</td> <td>NO</td> <td>No</td> </tr> <tr> <td>-bus_delimiter</td> <td>Bus Delimiter</td> <td><></td> <td><></td> </tr> <tr> <td>-slice_utilization_ratio</td> <td>Slice Utilization Ratio</td> <td>100</td> <td>100</td> </tr> <tr> <td>-bram_utilization_ratio</td> <td>BRAM Utilization Ratio</td> <td>100</td> <td>100</td> </tr> <tr> <td>-dsp_utilization_ratio</td> <td>DSP Utilization Ratio</td> <td>100</td> <td>100</td> </tr> <tr> <td>-reduce_control_sets</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-fsm_extract</td> <td> </td> <td>YES</td> <td>Yes</td> </tr> <tr> <td>-fsm_encoding</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-safe_implementation</td> <td> </td> <td>No</td> <td>No</td> </tr> <tr> <td>-fsm_style</td> <td> </td> <td>LUT</td> <td>LUT</td> </tr> <tr> <td>-ram_extract</td> <td> </td> <td>Yes</td> <td>Yes</td> </tr> <tr> <td>-ram_style</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-rom_extract</td> <td> </td> <td>Yes</td> <td>Yes</td> </tr> <tr> <td>-shreg_extract</td> <td> </td> <td>YES</td> <td>Yes</td> </tr> <tr> <td>-rom_style</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-auto_bram_packing</td> <td> </td> <td>NO</td> <td>No</td> </tr> <tr> <td>-resource_sharing</td> <td> </td> <td>YES</td> <td>Yes</td> </tr> <tr> <td>-async_to_sync</td> <td> </td> <td>NO</td> <td>No</td> </tr> <tr> <td>-use_dsp48</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-iobuf</td> <td> </td> <td>YES</td> <td>Yes</td> </tr> <tr> <td>-max_fanout</td> <td> </td> <td>100000</td> <td>100000</td> </tr> <tr> <td>-bufg</td> <td> </td> <td>16</td> <td>16</td> </tr> <tr> <td>-register_duplication</td> <td> </td> <td>YES</td> <td>Yes</td> </tr> <tr> <td>-register_balancing</td> <td> </td> <td>No</td> <td>No</td> </tr> <tr> <td>-optimize_primitives</td> <td> </td> <td>NO</td> <td>No</td> </tr> <tr> <td>-use_clock_enable</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-use_sync_set</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-use_sync_reset</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-iob</td> <td> </td> <td>Auto</td> <td>Auto</td> </tr> <tr> <td>-equivalent_register_removal</td> <td> </td> <td>YES</td> <td>Yes</td> </tr> <tr> <td>-slice_utilization_ratio_maxmargin</td> <td> </td> <td>5</td> <td>0</td> </tr> </TABLE> <A NAME="Operating System Information"></A> &nbsp

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