ADVANCED DIGITAL TECHNIQUES FOR
MEASUREMENT OF LOW VALUE CAPACITANCE FOR
APPLICATION IN MEMS
A DISSERTATION
Submitted to University of Mumbai in partial fulfillment of the
Requirement for the degree of
MASTER OF ENGINEERING
In
INSTRUMENTATION AND CONTROL
By
NEELU D. BHAGIA
Under the guidance of
DR. P. P. VAIDYA
DEPARTMENT OF INSTRUMENTAION ENGINEERING
VIVEKANAND EDUCATION SOCIETY’S INSTITUTE OF
TECHNOLOGY
SINDHI SOCIETY, CHEMBUR (E)
MUMBAI-400 071
UNIVERSITY OF MUMBAI
(2008)
i
VIVEKANAND EDUCATION SOCIETY’S INSTITUTE OF
TECHNOLOGY
SINDHI SOCIETY, CHEMBUR (E)
MUMBAI-400 071
CERTIFICATE
This is to certify that the dissertation entitled “Advanced digital techniques
for measurement of low value capacitance for application in MEMS” has
been completed successfully by Ms. Neelu Bhagia for the award of the
degree of Master of Engineering in Instrumentation and Control from
University of Mumbai.
Dr. P. P. Vaidya Dr. (Mrs.) Jayalaxmi Nair
Guide Principal
Department Of Instrumentation
And control
ii
VIVEKANAND EDUCATION SOCIETY’S INSTITUTE OF
TECHNOLOGY
SINDHI SOCIETY, CHEMBUR (E)
MUMBAI-400 071
DISSERTATION APPROVAL SHEET
This is to certify that the thesis entitled “Advanced Digital Techniques for
measurement of low value capacitance for application in MEMS” by Ms.
Neelu Bhagia is approved for the degree of Master Of Engineering in
Instrumentation and Control from University of Mumbai.
Examiners:
Internal Examiner External Examiner
(Signature) (Signature)
Name: Name:
Date: Date:
Seal of the Institute
iii
ACKNOWLEDGEMENT
At the outset I like to sincerely thank, my project guide and Head of
Instrumentation & Control Department, Dr. P. P. Vaidya for his valuable
guidance in my endeavor and without whose support it was not possible
to complete the project work.
I would like to show my gratitude towards Dr. (Mrs) J.M.Nair, Principal
VESIT and Chandane Sir , Assistant, R & D lab for their continuous
support and guidance and permitting me to carry out my project work at
Development Lab.
I also thank other Development Lab’s and VESIT’s Staff members for
extending their help whenever needed. I express my appreciation to all
those who have directly and indirectly helped me.
Finally, I also acknowledge the support and cooperation provided by my
husband Satyen, family members, all my friends and colleagues.
Neelu Bhagia
iv
TABLE OF CONTENTS
ABSTRACT…………………………………………………………………………. vi
LIST OF FIGUES…………………………………………………………………
vii
LIST OF TABLES…………………………………………………………………. ix
1. INTRODUCTION……………………………………………………………… 1
1. 2 GENERAL DESCRIPTION.................................................................................2
1. 3 INTRODUCTION TO CAPACITIVE SENSORS:..............................................2
1. 4 MOTIVATION:....................................................................................................4
1.5 BUILDING A RELIABLE CAPACITIVE-SENSOR INTERFACE: A
PROBLEM.....................................................................................................................4
1. 6 OBJECTIVE .........................................................................................................5
2. LITERATURE SUVEY ………………………………………………….8
2. 1 CHARGE AMPLIFIER ........................................................................................7
2. 2 CAPACITANCE SENSING USING R C OSCILLATOR .................................8
2. 3 SIGMA DELTA CONVERSION:......................................................................10
2. 4 CHOPPER STABILIZATION METHOD: .......................................................12
2. 5 CORRELATED DOUBLE SAMPLING:..........................................................14
2. 6 CAPACITANCE SENSING USING PROBE STATION.................................16
2. 7 MEASURING AC IMPEDANCE OF CAPACITOR: ......................................20
2. 8 CONSTANT CURRENT CHARGING:............................................................20
2. 9 OPTICAL METHODS.......................................................................................20
2.10 A DIGITAL SELF-BALANCING CIRCUIT TO MEASURE CAPACITANCE
AND LOSS CONDUCTANCE FOR INDUSTRIAL TRANSDUCER
APPLICATIONS .........................................................................................................21
3. DESIGN OF CAPACITITANCE SENSING CIRCUIT ................................. 26
3. 1 RATIOMETRIC TECHNIQUE FOR CAPACITANCE MEASUREMENT 26
3.1. 1 CASE 1: When Z1 = C1………………………………………………… 27
3.1. 2 CASE 2: When Z1 = R......................................................................................30
3. 2 PROPOSED SCHEME.....................................................................................30
3. 3 SYSTEM LEVEL BLOCK DIAGRAM...........................................................30
3.3. 1 Sensing And Front End Electronics………………………………………. 30
3.3. 2 Analog To Digital Converter: ...........................................................................30
3.3. 3 Microcontroller Block:......................................................................................31
3.3. 4 Personal Computer Or Display Block:..............................................................31
3. 4 FUNCTIONAL BLOCK DIAGRAM OF THE ACTUAL SYSTEM:.............31
4. A HIGH ESOLUTION ADC & ASSOCIATED SYSTEM............................. 34
4. 1 DESCRIPTION:.................................................................................................33
4. 2 OVERVIEW OF BLOCK DIAGRAM:.............................................................34
4.2. 1 Input Multiplexer ...............................................................................................34
4.2. 2 PGA (Programmable Gain Amplifier)..............................................................35
4.2. 3 Modulator:.........................................................................................................37
4.2. 4 Digital filter:......................................................................................................37
4.2. 5 Offset and full scale calibration: .......................................................................38
4.2. 6 Serial interface: .................................................................................................39
4.2. 7 Control Block: 39
4. 3 DEVICE INFORMATION & TERMINAL FUNCTIONS..............................40
4. 4 ELECTRICAL CHARACTERISTICS.............................................................42
