DA_AD.rar_FPGA设计_ad fpga_ad设计_fpga ad_q da da歌曲

State Machine - |DA_AD|TLV1544:ins_TLV1544|w_state Name w_state.wait_td w_state.conver w_state.read10 w_state.read9 w_state.read8 w_state.read7 w_state.read6 w_state.read5 w_state.read4 w_state.read3 w_state.read2 w_state.read1 w_state.w_idle w_state.w_idle 0 0 0 0 0 0 0 0 0 0 0 0 0 w_state.read1 0 0 0 0 0 0 0 0 0 0 0 1 1 w_state.read2 0 0 0 0 0 0 0 0 0 0 1 0 1 w_state.read3 0 0 0 0 0 0 0 0 0 1 0 0 1 w_state.read4 0 0 0 0 0 0 0 0 1 0 0 0 1 w_state.read5 0 0 0 0 0 0 0 1 0 0 0 0 1 w_state.read6 0 0 0 0 0 0 1 0 0 0 0 0 1 w_state.read7 0 0 0 0 0 1 0 0 0 0 0 0 1 w_state.read8 0 0 0 0 1 0 0 0 0 0 0 0 1 w_state.read9 0 0 0 1 0 0 0 0 0 0 0 0 1 w_state.read10 0 0 1 0 0 0 0 0 0 0 0 0 1 w_state.conver 0 1 0 0 0 0 0 0 0 0 0 0 1 w_state.wait_td 1 0 0 0 0 0 0 0 0 0 0 0 1 State Machine - |DA_AD|TLV1544:ins_TLV1544|ini_state Name ini_state.ini_done ini_state.data_in4 ini_state.data_in3 ini_state.data_in2 ini_state.data_in1 ini_state.ini_idle ini_state.ini_idle 0 0 0 0 0 0 ini_state.data_in1 0 0 0 0 1 1 ini_state.data_in2 0 0 0 1 0 1 ini_state.data_in3 0 0 1 0 0 1 ini_state.data_in4 0 1 0 0 0 1 ini_state.ini_done 1 0 0 0 0 1 State Machine - |DA_AD|Cordic:ins_Cordic|quad_state Name quad_state.quad3 quad_state.quad2 quad_state.quad1 quad_state.quad_idle quad_state.quad4 quad_state.quad_idle 0 0 0 0 0 quad_state.quad1 0 0 1 1 0 quad_state.quad2 0 1 0 1 0 quad_state.quad3 1 0 0 1 0 quad_state.quad4 0 0 0 1 1 State Machine - |DA_AD|Cordic:ins_Cordic|ITER_STATE Name ITER_STATE.DONE ITER_STATE.ITER10 ITER_STATE.ITER9 ITER_STATE.ITER8 ITER_STATE.ITER7 ITER_STATE.ITER6 ITER_STATE.ITER5 ITER_STATE.ITER4 ITER_STATE.ITER3 ITER_STATE.ITER2 ITER_STATE.ITER1 ITER_STATE.READY ITER_STATE.IDLE ITER_STATE.IDLE 0 0 0 0 0 0 0 0 0 0 0 0 0 ITER_STATE.READY 0 0 0 0 0 0 0 0 0 0 0 1 1 ITER_STATE.ITER1 0 0 0 0 0 0 0 0 0 0 1 0 1 ITER_STATE.ITER2 0 0 0 0 0 0 0 0 0 1 0 0 1 ITER_STATE.ITER3 0 0 0 0 0 0 0 0 1 0 0 0 1 ITER_STATE.ITER4 0 0 0 0 0 0 0 1 0 0 0 0 1 ITER_STATE.ITER5 0 0 0 0 0 0 1 0 0 0 0 0 1 ITER_STATE.ITER6 0 0 0 0 0 1 0 0 0 0 0 0 1 ITER_STATE.ITER7 0 0 0 0 1 0 0 0 0 0 0 0 1 ITER_STATE.ITER8 0 0 0 1 0 0 0 0 0 0 0 0 1 ITER_STATE.ITER9 0 0 1 0 0 0 0 0 0 0 0 0 1 ITER_STATE.ITER10 0 1 0 0 0 0 0 0 0 0 0 0 1 ITER_STATE.DONE 1 0 0 0 0 0 0 0 0 0 0 0 1 State Machine - |DA_AD|TLC5620_driver:ins_TLC5620_driver|DAC_STATE Name DAC_STATE.UPDATE DAC_STATE.WR_D0 DAC_STATE.WR_D1 DAC_STATE.WR_D2 DAC_STATE.WR_D3 DAC_STATE.WR_D4 DAC_STATE.WR_D5 DAC_STATE.WR_D6 DAC_STATE.WR_D7 DAC_STATE.WR_RNG DAC_STATE.WR_A0 DAC_STATE.WR_A1 DAC_STATE.IDLE DAC_STATE.IDLE 0 0 0 0 0 0 0 0 0 0 0 0 0 DAC_STATE.WR_A1 0 0 0 0 0 0 0 0 0 0 0 1 1 DAC_STATE.WR_A0 0 0 0 0 0 0 0 0 0 0 1 0 1 DAC_STATE.WR_RNG 0 0 0 0 0 0 0 0 0 1 0 0 1 DAC_STATE.WR_D7 0 0 0 0 0 0 0 0 1 0 0 0 1 DAC_STATE.WR_D6 0 0 0 0 0 0 0 1 0 0 0 0 1 DAC_STATE.WR_D5 0 0 0 0 0 0 1 0 0 0 0 0 1 DAC_STATE.WR_D4 0 0 0 0 0 1 0 0 0 0 0 0 1 DAC_STATE.WR_D3 0 0 0 0 1 0 0 0 0 0 0 0 1 DAC_STATE.WR_D2 0 0 0 1 0 0 0 0 0 0 0 0 1 DAC_STATE.WR_D1 0 0 1 0 0 0 0 0 0 0 0 0 1 DAC_STATE.WR_D0 0 1 0 0 0 0 0 0 0 0 0 0 1 DAC_STATE.UPDATE 1 0 0 0 0 0 0 0 0 0 0 0 1