Description of program
1. Convert input bits to bipolar bits.. 1 to 1 and 0 to -1 for user1 and user2
2. Take 100 samples per bit for both user1 and user2 and then plot base band signal
which is in bipolar NRZ format.
3. Then BPSK modulate the signal. Take care that sampling rate of sinusoidal carrier
matches the sampling rate per bit. Here it is 100 samples per carrier and then plot
the BPSK signal
4.
This segment of code:
for i=1:length_user1
for j=1:10 %chip rate is 10 times the bit rate
pn1=[pn1 seed1(4)];
if seed1 (4)==seed1(3) temp=-1;
else temp=1;
end
seed1(4)=seed1(3);
seed1(3)=seed1(2);
seed1(2)=seed1(1);
seed1(1)=temp;
end
end
performs the function of exclusive or gate and shift registers. There are 4 shift registers
XOR the contents of register3 and register4 and put the result in register1 , move the
original contents of shift register1 to register2 and register2 to register3, register3 to
register 4 and the content of register4 is the chip of PN code at each clock pulse
5. Multiply the BPSK modulated signal with the PN code. Here again the care
should be taken to match the sampling rate. i.e no. of chip per bit* no of
samples per chip = no of samples per bit of BPSK modulated signal.
6. Same procedure is carried out for user2 bits.
7. The channel is AWGN channel with SNR 5 dbs. In channel the signal from user1
is added to signal from user2 and white Guassian noise is added.
8. At receiver end , first received signal is multiples with PN then BPSK
demodulated by multiplying with the carrier(coherent demod)
9. then the samples over 1 bit interval is summed. And if the sum is greater than 0
than the received bit is 1 else rxbit is 0. Summation is used in place of integration
because it is a discrete time system
10. Same procedure is repeated for user2.
Conclusion: If SNR is of more than some reasonable value there are no bit errors.
