#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/fb.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/uaccess.h>
#include <video/fbcon.h>
#include <video/fbcon-mfb.h>
#include <video/fbcon-cfb4.h>
#include <video/fbcon-cfb8.h>
#include <video/fbcon-cfb16.h>
#include "s3c2410fb.h"
void (*s3c2410fb_blank_helper)(int blank);
EXPORT_SYMBOL(s3c2410fb_blank_helper);
/*
* CONFIG_FB_S3C2410_EMUL
*
* 娴兼瑥绻?閻愵噣銈惃瀣挬閼筹拷? : 96*320 娣囧﹪绱︽顓熷船鐠侊拷
*
* var.xres = 96 閺嶅繗鍋?缁愬秶绮?
* fix.line_length = 240*2 閼诧拷閼煎嫪绺?
* app 閸燂拷linux FB spec.
闂冿拷闂囨牞宕橀懠鍕妇閹硷拷瀹糕晛濮忛崯锟界紒婵嬫 瀹稿瓨宕穱锟? *
* var.xres_virtual 闂冿拷閻愬吋鎾粣宥囪瘽
鐟欏嫯绻冨锟界粔顖炴▼缁夛拷閺夛拷閼斤拷娑旀劗妲悥锟?spec.
閼荤偟璇?閸犲﹥銆傞懖锟?* app.
閸燂拷閸愯櫕鐥?鎼达箑瀹崇粔锕�鍙?娑擄拷閹搞儳鍩?闁版帟浠鹃幍锟?panning/wrapping
閼伙拷闁劏锟斤拷閸亜螛閸燂拷 * 娑旀劖鐖銊ㄥ仱 绾懎濮忛懠鍕妇.
*/
//#define CONFIG_S3C2410_SMDK_800480_WHL
//#define CONFIG_S3C2410_SMDK_640480
//#define CONFIG_S3C2410_SMDK_320240
//#define CONFIG_S3C2410_SMDK_STN_640480
//#define CONFIG_S3C2410_SMDK_240320
//#define CONFIG_S3C2410_SMDK_800600
#ifdef CONFIG_S3C2410_SMDK_STN_640480
static struct s3c2410fb_rgb rgb_8 = {
red: {offset: 5, length: 3, },
green: {offset: 2, length: 3, },
blue: {offset: 0, length: 2, },
transp: {offset: 0, length: 0, },
};
#else
static struct s3c2410fb_rgb rgb_8 = {
red: {offset: 0, length: 4, },
green: {offset: 0, length: 4, },
blue: {offset: 0, length: 4, },
transp: {offset: 0, length: 0, },
};
#endif
static struct s3c2410fb_rgb def_rgb_16 = {
red: {offset: 11, length: 5, },
green: {offset: 5, length: 6, },
blue: {offset: 0, length: 5, },
transp: {offset: 0, length: 0, },
};
#if 0
static struct s3c2410fb_rgb xxx_tft_rgb_16 = {
red: {offset: 11, length: 5, },
green: {offset: 6, length: 5, },
blue: {offset: 1, length: 5, },
transp: {offset: 0, length: 1, },
};
#else
static struct s3c2410fb_rgb xxx_tft_rgb_16 = {
red: {offset: 11, length: 5, },
green: {offset: 5, length: 6, },
blue: {offset: 0, length: 5, },
transp: {offset: 0, length: 0, },
};
#endif
#if 0
#ifdef CONFIG_S3C2410_SMDK
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 174757, bpp: 16,
#ifdef CONFIG_FB_S3C2410_EMUL
xres: 96,
#else
xres: 240,
#endif
yres: 320,
hsync_len : 5, vsync_len : 1,
left_margin : 7, upper_margin : 1,
right_margin: 3, lower_margin : 3,
sync: 0, cmap_static: 1,
reg : {
lcdcon1 : LCD1_BPP_16T | LCD1_PNR_TFT | LCD1_CLKVAL(1) ,
lcdcon2 : LCD2_VBPD(1) | LCD2_VFPD(2) | LCD2_VSPW(1),
lcdcon3 : LCD3_HBPD(6) | LCD3_HFPD(2),
lcdcon4 : LCD4_HSPW(4) | LCD4_MVAL(13),
lcdcon5 : LCD5_FRM565 | LCD5_INVVLINE | LCD5_INVVFRAME | LCD5_HWSWP |
LCD5_PWREN,
},
};
#endif
#else
#ifdef CONFIG_S3C2410_SMDK_640480
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 39721, bpp: 16,
#ifdef CONFIG_FB_S3C2410_EMUL
xres: 96,
#else
xres: 640,
#endif
yres: 480,
hsync_len : 96, vsync_len : 2,
left_margin : 40, upper_margin : 24,
right_margin: 32, lower_margin : 11,
sync: 0, cmap_static: 1,
reg : {
lcdcon1 : LCD1_BPP_16T | LCD1_PNR_TFT | LCD1_CLKVAL(1) ,
lcdcon2 : LCD2_VBPD(32) | LCD2_VFPD(9) | LCD2_VSPW(1),
lcdcon3 : LCD3_HBPD(47) | LCD3_HFPD(15),
lcdcon4 : LCD4_HSPW(95) | LCD4_MVAL(13),
lcdcon5 : LCD5_FRM565 | LCD5_INVVLINE | LCD5_INVVFRAME | LCD5_HWSWP |
LCD5_PWREN,
},
};
#endif
#ifdef CONFIG_S3C2410_SMDK_800600
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 39721, bpp: 16,
#ifdef CONFIG_FB_S3C2410_EMUL
xres: 96,
#else
xres: 800,
#endif
yres: 600,
hsync_len : 96, vsync_len : 2,
left_margin : 40, upper_margin : 24,
right_margin: 32, lower_margin : 11,
sync: 0, cmap_static: 1,
reg : {
lcdcon1 : LCD1_BPP_16T | LCD1_PNR_TFT | LCD1_CLKVAL(1) ,
lcdcon2 : LCD2_VBPD(3) | LCD2_VFPD(2) | LCD2_VSPW(2),
lcdcon3 : LCD3_HBPD(28) | LCD3_HFPD(50),
lcdcon4 : LCD4_HSPW(15) | LCD4_MVAL(13),
lcdcon5 : LCD5_FRM565 | LCD5_INVVLINE | LCD5_INVVFRAME | LCD5_HWSWP |
LCD5_PWREN,
},
};
#endif
#ifdef CONFIG_S3C2410_SMDK_800480_WHL
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 39721, bpp: 16,
#ifdef CONFIG_FB_S3C2410_EMUL
xres: 96,
#else
xres: 800,
#endif
yres: 480,
hsync_len : 96, vsync_len : 2,
left_margin : 40, upper_margin : 24,
right_margin: 32, lower_margin : 11,
sync: 0, cmap_static: 1,
reg : {
lcdcon1 : LCD1_BPP_16T | LCD1_PNR_TFT | LCD1_CLKVAL(1) ,
lcdcon2 : LCD2_VBPD(39) | LCD2_VFPD(19) | LCD2_VSPW(3),
lcdcon3 : LCD3_HBPD(49) | LCD3_HFPD(19),
lcdcon4 : LCD4_HSPW(99) | LCD4_MVAL(13),
lcdcon5 : LCD5_FRM565 | LCD5_INVVLINE | LCD5_INVVFRAME | LCD5_HWSWP |
LCD5_PWREN,
},
};
#endif
#ifdef CONFIG_S3C2410_SMDK_320240
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 39721, bpp: 16,
#ifdef CONFIG_FB_S3C2410_EMUL
xres: 96,
#else
xres: 320,
#endif
yres: 240,
hsync_len : 5, vsync_len : 1,
left_margin : 7, upper_margin : 1,
right_margin: 3, lower_margin : 3,
sync: 0, cmap_static: 1,
reg : {
lcdcon1 : LCD1_BPP_16T | LCD1_PNR_TFT | LCD1_CLKVAL(5) ,
lcdcon2 : LCD2_VBPD(1) | LCD2_VFPD(2) | LCD2_VSPW(1),
lcdcon3 : LCD3_HBPD(49) | LCD3_HFPD(15),
lcdcon4 : LCD4_HSPW(13) | LCD4_MVAL(13),
lcdcon5 : LCD5_FRM565 | LCD5_INVVLINE | LCD5_INVVFRAME | LCD5_HWSWP |
LCD5_PWREN,
},
};
#endif
//SAMSUNG LTV350QV 3.5IN TFT LCD panel
#ifdef CONFIG_S3C2410_SMDK_S320240
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 5000, bpp: 16,
#ifdef CONFIG_FB_S3C2410_EMUL
xres: 96,
#else
xres: 320,
#endif
yres: 240,
hsync_len : 5, vsync_len : 1,
left_margin : 7, upper_margin : 1,
right_margin: 3, lower_margin : 3,
sync: 0, cmap_static: 1,
reg : {
lcdcon1 : LCD1_BPP_16T | LCD1_PNR_TFT | LCD1_CLKVAL(10) ,
lcdcon2 : LCD2_VBPD(3) | LCD2_VFPD(5) | LCD2_VSPW(15),
lcdcon3 : LCD3_HBPD(5) | LCD3_HFPD(15),
lcdcon4 : LCD4_HSPW(8) | LCD4_MVAL(13),
// lcdcon2 : LCD2_VBPD(3) | LCD2_VFPD(10) | LCD2_VSPW(15),
// lcdcon3 : LCD3_HBPD(5) | LCD3_HFPD(15),
// lcdcon4 : LCD4_HSPW(8) | LCD4_MVAL(13),
lcdcon5 : LCD5_FRM565 | LCD5_INVVLINE | LCD5_INVVFRAME | LCD5_HWSWP |
LCD5_PWREN,
},
};
#endif
#ifdef CONFIG_S3C2410_SMDK_240320
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 5000, bpp: 16,
#ifdef CONFIG_FB_S3C2410_EMUL
xres: 96,
#else
xres: 320,
#endif
yres: 240,
hsync_len : 5, vsync_len : 1,
left_margin : 7, upper_margin : 1,
right_margin: 3, lower_margin : 3,
sync: 0, cmap_static: 1,
reg : {
lcdcon1 : LCD1_BPP_16T | LCD1_PNR_TFT | LCD1_CLKVAL(10) ,
lcdcon2 : LCD2_VBPD(3) | LCD2_VFPD(5) | LCD2_VSPW(15),
lcdcon3 : LCD3_HBPD(5) | LCD3_HFPD(15),
lcdcon4 : LCD4_HSPW(8) | LCD4_MVAL(13),
// lcdcon2 : LCD2_VBPD(3) | LCD2_VFPD(10) | LCD2_VSPW(15),
// lcdcon3 : LCD3_HBPD(5) | LCD3_HFPD(15),
// lcdcon4 : LCD4_HSPW(8) | LCD4_MVAL(13),
lcdcon5 : LCD5_FRM565 | LCD5_INVVLINE | LCD5_INVVFRAME | LCD5_HWSWP |
LCD5_PWREN,
},
};
#endif
/*
static struct s3c2410fb_mach_info xxx_stn_info __initdata = {
pixclock: 39721, bpp: 16,
#ifde
