/******************************************************************************
Copyright (c) 2003 MStar Semiconductor, Inc.
All rights reserved.
[Module Name]: Uart.c
[Date]: 04-Nov-2003
[Comment]:
Uart subroutines.
[Reversion History]:
*******************************************************************************/
#define _UART_C_
// System
#include <intrins.h>
// Common
#include "define.h"
#include "mcu.h"
#include "global.h"
#include "msio.h"
// External
#include "msHdcp.h"
// Internal
#include "uart.h"
#include "debug.h"
////////////////////////////////
// Initialize uart
////////////////////////////////
/*
//---------------------------------------------------------
//
//
// mcp_uart0 4 for deflection MCU
// vd_uart1 3
// vd_uart0 2
// hk_uart1 1
// hk_uart0 0
// h0005 h0005 14 12 reg_uart1 2 0 3 h0 rw "selection of specify some pads as UART1 function0: disableothers: see GPIO table"
// uart0 uart1
// con7 con6
// 39a 5v nc
// gnd gnd
// rxd rxd1(GPIOB[5], p191, GOE)
// txd txd1(GPIOB[6], p192, GSP)
// reg_UART1
// 3
// PAD_GPIOB[5] UART1_RX
// PAD_GPIOB[6] UART1_TX
make following disable
reg_UART0
8
reg_I2S_Out1
8
reg_TCOM
1
-----------------------------------------------------------*/
/*
//---------------------------------------------------------
//
// uart0 uart1
// con7 con6
// 39b 5v nc
// gnd gnd
// rxd rxd1(GPIOL[0],
// txd txd1(GPIOL[1], p42, LED-R)
//---------------------------------------------------------
// reg_UART1
// 6
// PAD_GPIOL[0] UART1_RX
// PAD_GPIOL[1] UART1_TX
make sure all following is disable
reg_IIC_MST
2
IIC_MCLK
IIC_MDAT
reg_I2S_In
5
AIWS
AISCK
reg_I2S_Out1
3
AUMCKO
AUWS
reg_I2S_Out2
1
AU2MCKO
AU2WS
reg_UART0
7
UART_RX0
UART_TX0
default
1
SET_GPIOL0
SET_GPIOL1
// 39c
reg_UART1
4
PAD_GPIOT[2] UART1_RX
PAD_GPIOT[3] UART1_TX
*/
//-------------------------------------
// 9600
// 170000000 -0.11%
// 160000000 -0.03%
// 144000000 -0.05%
// 123000000 -0.15%
// 108000000 -0.12%
// 150000000 -0.15%
// 75000000 -0.35%
// 12000000 -2.34%
//-------------------------------------
//h0055 h0055 4 2 reg_uart_sel0 2 0 3 h0 rw "reg_uart_sel00: hk_51 uart0; 1: hk_51 uart1; 2: vd_51 uart0; 3: aeon; 4: tsp"
//h0055 h0055 7 5 reg_uart_sel1 2 0 3 h1 rw "reg_uart_sel10: hk_51 uart0; 1: hk_51 uart1; 2: vd_51 uart0; 3: aeon; 4: tsp"
void uartInitialize(void)
{
UseUart1();
TI0_FLAG=0;
TI1_FLAG=0;
//msWriteByteMask(REG_1E03, 0x04, 0x04); // RX enable
msWriteByte(REG_1EAA, (EnableMondrianMCUart)? 0x80:0x20); // UART_SEL1 = MCP_UART0
msWriteBit(REG_1E03, _ENABLE, _BIT2);
// uart0
ADCON |= _BIT7; // use S0RELH, S0RELL as baudrate generator
S0RELH=HIBYTE(S0REL); // baudrate = fclk/(2^SMOD*32*(2^10-s1rel))
S0RELL=LOBYTE(S0REL); // smod0=0, s1rel = 1024-(fclk/baudrate)/64
// smod0=1, s1rel = 1024-(fclk/baudrate)/32
SCON = 0x50; // mode 1, 8-bit UART, enable receive
if(_SMOD) PCON |= _BIT7;
TI = 0; // clear transfer flag
ES = 1; // enable uart interrupt
// uart1
S1RELH=HIBYTE(S1REL); // baudrate = fclk/(32*(2^10-s1rel))
S1RELL=LOBYTE(S1REL); // 1024-s1rel =(fclk/baudrate)/32
// s1rel = 1024-(fclk/baudrate)/32
// SFR: 0x9B
// s1con [7]: 0:9-bit 1: 8-bit
// [6]: not used
// [5]: multiple processor enable
// [4]: reception enable
// [3]: tb81
// [2]: rb81
// [1]: ti1
// [0]: ri1
S1CON = (_BIT7 | _BIT4);
IEN2 = ES1; // ES1 =1;
//SMOD S0REL S0REL[9:0](truncate) S0RELH S0RELL
/*
TMOD = (TMOD & 0x0f) | 0x20; // timer1, mode 2, 8-bit reload
TH1 = TIMER1_MODE2_TH1; // set timer1(buad rate)
TR1 = 1; // timer1 run
#if (UART_SELECTION == UART_0)
SCON = 0x50; // mode 1, 8-bit UART, enable receive
if(_SMOD) PCON |= _BIT7;
TI = 0; // clear transfer flag
ES = 1; // enable uart interrupt
#endif
#if (UART_SELECTION == UART_1)
SCON1=0x50; // mode 1, 8-bit UART, enable receive
TI1 = 0; // clear transfer flag
PS1 = 0; // set uart priority low
ES1=1; // enable uart interrupt
#endif
*/
// reset Uart variables
g_UartCommand.Index = 0;
g_bDebugASCIICommandFlag = _DISABLE;
// g_bDebugASCIICommandFlag = _ENABLE;
g_bDebugProgStopFlag = FALSE;
g_bSimulateStopFlag = FALSE;
}
//////////////////////////////////////////////////////////////
// Put character to uart
//
// Arguments: ucVal - output character
//////////////////////////////////////////////////////////////
#if (_DEBUG_RW_REG_EN_||_DEBUG_PRINT_EN_)
void putchar(BYTE ucVal)
{
SBUF = ucVal; // transfer to uart
while(1)
{
if(EA&&ES)
{
if (TI0_FLAG)
{
TI0_FLAG = 0;
break;
}
}
else
{
if (TI)
{
TI = 0;
break;
}
}
}
}
#endif
#if(ENABLE_UART1)
void putchar1(BYTE ucVal)
{
// s1con: SFR(0x9B)
// [7]: sm
// [6]: -
// [5]: sm21
// [4]: ren1
// [3]: tb81
// [2]: rb81
// [1]: ti1
// [0]: ri0
SBUF1 = ucVal; // transfer to uart
while(1)
{
if(EA&&(IEN2&_BIT0))
{ // check ES1
if (TI1_FLAG)
{
TI1_FLAG= 0;
break;
}
}
else
{
if ((S1CON&_BIT1)==_BIT1)
{
S1CON &= ~_BIT1;
break;
}
}
}
}
#endif
//////////////////////////////////////////////////////////////////////////////
// Put string to uart.
//
// Arguments: pFmt - string address
//////////////////////////////////////////////////////////////////////////////
#if (_DEBUG_PRINT_EN_)
void putstr(BYTE code *pFmt)
{
BYTE ucBff; // character buffer
while (1)
{
#if ENABLE_CEC
msHDMICecChkBuf();
#endif
ucBff = *pFmt; // get a character
if (ucBff == _EOS_) // check end of string
break;
putchar(ucBff); // put a character
pFmt++; // next
} // while
}
#endif
#ifdef JP_OSD_DEBUG
void putstr_(BYTE *pFmt)
{
BYTE ucBff; // character buffer
while (1)
{
ucBff = *pFmt; // get a character
if (ucBff == _EOS_) // check end of string
break;
putchar(ucBff); // put a character
pFmt++; // next
} // while
}
#endif
#if(ENABLE_UART1)
void putstr1(BYTE code *pFmt)
{
BYTE ucBff; // character buffer
while (1)
{
ucBff = *pFmt; // get a character
if (ucBff == _EOS_) // check end of string
break;
putchar1(ucBff); // put a character
pFmt++; // next
} // while
}
#endif
//////////////////////////////////////////////////////////////////////////////
// Put string to uart with variable argument
//
// Arguments: pFmt - string address
// wVal - print variable
////////////////////////////////////////////////////////////////////