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SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
This document contains information on a new product. Specifications and information herein are subject to change
without notice.
http://www.solomon-systech.com
SSD1681
Rev 1.1
P 1/43
Apr 2021
Copyright 2021 Solomon Systech Limited
SSD1681
Advance Information
200 Source x 200 Gate Red/Black/White
Active Matrix EPD Display Driver with Controller
SSD1681
Rev 1.1
P 2/43
Apr 2021
Solomon Systech
Appendix: IC Revision history of SSD1681 Specification
Version
Change Items
Effective Date
1.0
Initial Release
05-Nov-2019
1.1
Added ordering part number: SSD1681Z2, SSD1681ZA and SSD1681ZB for
9um bump height
23-Apr-2021
SSD1681
Rev 1.1
P 3/43
Apr 2021
Solomon Systech
CONTENTS
1 GENERAL DESCRIPTION ....................................................................................................... 5
2 FEATURES ............................................................................................................................... 5
3 ORDERING INFORMATION..................................................................................................... 6
4 BLOCK DIAGRAM ................................................................................................................... 7
5 PIN DESCRIPTION ................................................................................................................... 8
6 FUNCTIONAL BLOCK DESCRIPTION .................................................................................. 11
6.1 MCU INTERFACE ........................................................................................................................... 11
6.1.1 MCU INTERFACE SELECTION.......................................................................................................... 11
6.1.2 MCU SERIAL INTERFACE (4-WIRE SPI) ........................................................................................... 11
6.1.3 MCU SERIAL PERIPHERAL INTERFACE (3-WIRE SPI) ....................................................................... 12
6.2 OSCILLATOR .............................................................................................................................. 13
6.3 BOOSTER & REGULATOR ......................................................................................................... 13
6.4 VCOM SENSING ......................................................................................................................... 13
6.5 RAM ............................................................................................................................................ 14
6.6 PROGRAMMABLE WAVEFORM FOR GATE, SOURCE AND VCOM ........................................................ 14
6.7 WAVEFORM SETTING ............................................................................................................... 16
6.8 TEMPERATURE SEARCHING............................................................................................................ 17
6.8.1 INTERNAL TEMPERATURE SENSOR ................................................................................................. 17
6.8.2 EXTERNAL TEMPERATURE SENSOR I2C SINGLE MASTER INTERFACE ............................................... 17
6.8.3 FORMAT OF TEMPERATURE VALUE .................................................................................................. 17
6.9 WAVEFORM SETTING SEARCHING MECHANISM ................................................................................ 18
6.10 ONE TIME PROGRAMMABLE (OTP) MEMORY ................................................................................... 19
6.11 THE FORMAT FOR TEMPERATURE RANGE (TR) ............................................................................... 19
6.12 VCI DETECTION ............................................................................................................................ 20
6.13 HV READY DETECTION .................................................................................................................. 20
7 COMMAND TABLE ................................................................................................................ 21
8 OPERATION FLOW AND CODE SEQUENCE ...................................................................... 35
8.1 GENERAL OPERATION FLOW TO DRIVE DISPLAY PANEL ..................................................................... 35
9 ABSOLUTE MAXIMUM RATING ........................................................................................... 36
10 ELECTRICAL CHARACTERISTICS ................................................................................... 36
11 AC CHARACTERISTICS .................................................................................................... 38
11.1 SERIAL PERIPHERAL INTERFACE ..................................................................................................... 38
12 APPLICATION CIRCUIT ..................................................................................................... 39
13 PACKAGE INFORMATION ................................................................................................ 40
13.1 DIE TRAY DIMENSIONS FOR SSD1681Z AND SSD1681Z2............................................................... 40
13.2 DIE TRAY DIMENSIONS FOR SSD1681Z8 AND SSD1681ZA ............................................................ 41
13.3 DIE TRAY DIMENSIONS FOR SSD1681Z0 AND SSD1681ZB ............................................................ 42
SSD1681
Rev 1.1
P 4/43
Apr 2021
Solomon Systech
TABLES
TABLE 3-1 : ORDERING INFORMATION .............................................................................................................. 6
TABLE 5-1: POWER SUPPLY PINS .................................................................................................................... 8
TABLE 5-2: INTERFACE LOGIC PINS .................................................................................................................. 9
TABLE 5-3: ANALOG PINS .............................................................................................................................. 10
TABLE 5-4: DRIVER OUTPUT PINS .................................................................................................................. 10
TABLE 5-5: MISCELLANEOUS PINS ................................................................................................................. 10
TABLE 6-1 : INTERFACE PINS ASSIGNMENT UNDER DIFFERENT MCU INTERFACE ............................................... 11
TABLE 6-2 : CONTROL PINS STATUS OF 4-WIRE SPI ........................................................................................ 11
TABLE 6-3 : CONTROL PINS STATUS OF 3-WIRE SPI ........................................................................................ 12
TABLE 6-4 : RAM BIT AND LUT MAPPING FOR 3-COLOR DISPLAY ...................................................................... 14
TABLE 6-5 : RAM BIT AND LUT MAPPING FOR BLACK/WHITE DISPLAY ............................................................... 14
TABLE 6-6 : VS[NX-LUTM] SETTINGS FOR SOURCE VOLTAGE AND VCOM VOLTAGE ......................................... 15
TABLE 6-7 : EXAMPLE OF 12-BIT BINARY TEMPERATURE SETTINGS FOR TEMPERATURE RANGES ........................ 17
TABLE 6-8 : EXAMPLE OF WAVEFORM SETTINGS SELECTION BASED ON TEMPERATURE RANGES. ........................ 18
TABLE 7-1: COMMAND TABLE ........................................................................................................................ 21
TABLE 9-1 : MAXIMUM RATINGS ..................................................................................................................... 36
TABLE 10-1: DC CHARACTERISTICS ............................................................................................................... 36
TABLE 10-2: REGULATORS CHARACTERISTICS ............................................................................................... 37
TABLE 11-1 : SERIAL PERIPHERAL INTERFACE TIMING CHARACTERISTICS ........................................................ 38
TABLE 12-1: COMPONENT LIST FOR SSD1681 APPLICATION CIRCUIT ............................................................... 39
FIGURES
FIGURE 4-1 : SSD1681 BLOCK DIAGRAM ................................................................................................................................. 7
FIGURE 6-1 : WRITE PROCEDURE IN 4-WIRE SPI MODE ....................................................................................................... 11
FIGURE 6-2 : READ PROCEDURE IN 4-WIRE SPI MODE ......................................................................................................... 12
FIGURE 6-3 : WRITE PROCEDURE IN 3-WIRE SPI ................................................................................................................... 12
FIGURE 6-4 : READ PROCEDURE IN 3-WIRE SPI MODE ......................................................................................................... 13
FIGURE 6-5 : GATE WAVEFORM AND PROGRAMMABLE SOURCE AND VCOM WAVEFORM ILLUSTRATION ................. 14
FIGURE 6-6 : WAVEFORM SETTING MAPPING .......................................................................................................................... 16
FIGURE 6-7 : THE WAVEFORM SETTING MAPPING IN OTP FOR WAVEFORM SETTING AND TEMPERATURE RANGE .. 19
FIGURE 6-8 : FORMAT OF TEMPERATURE RANGE (TR) IN OTP ......................................................................................... 19
FIGURE 8-1: OPERATION FLOW TO DRIVE DISPLAY PANEL ................................................................................................... 35
FIGURE 11-1: SPI TIMING DIAGRAM .......................................................................................................................................... 38
FIGURE 12-1: SCHEMATIC OF SSD1681 APPLICATION CIRCUIT ......................................................................................... 39
FIGURE 13-1 : SSD1681Z AND SSD1681Z2 DIE TRAY INFORMATION (UNIT: MM) ......................................................... 40
FIGURE 13-2 : SSD1681Z8 AND SSD1681ZA DIE TRAY INFORMATION (UNIT: MM) ...................................................... 41
FIGURE 13-3 : SSD1681Z0 AND SSD1681ZB DIE TRAY INFORMATION (UNIT: MM) ...................................................... 42
SSD1681
Rev 1.1
P 5/43
Apr 2021
Solomon Systech
1 GENERAL DESCRIPTION
SSD1681 is an Active Matrix EPD display driver with controller for Red/Black/White EPD displays.
It consists of 200 source outputs, 200 gate outputs, 1 VCOM and 1VBD (for border), which can support displays
with resolution up to 200x200.
In the SSD1681, data and commands are sent from MCU through hardware selectable serial peripheral interface.
It has embedded booster, regulator and oscillator which is suitable for EPD display applications.
2 FEATURES
Design for dot matrix type active matrix EPD display, support Red/Black/White color
Resolution: 200 source outputs, 200 gate outputs, 1 VCOM and 1VBD (for border)
Power supply:
VCI: 2.2 to 3.7V
VDDIO: Connect to VCI
VDD: 1.8V, regulate from VCI supply
On chip display RAM
Mono B/W: 200x200 bits
Mono Red: 200x200 bits
On-chip booster and regulator for generating VCOM, Gate and Source driving voltage
Gate driving output voltage: 2-level outputs (VGH, VGL), Max 40Vp-p
VGH: 10V to 20V (Voltage adjustment step: 500mV)
VGL: -VGH (Voltage adjustment step: 500mV)
Source / VBD driving output voltage: 4-levels outputs (VSH1, VSH2, VSS and VSL)
VSH1/VSH2: 2.4V to 17V (Voltage adjustment step: 100mV for 2.4V to 8.8V, 200mV for 8.8V to
17V)
VSL: -5V to -17V (Voltage adjustment step: 500mV)
VCOM output voltage
DCVCOM: -3V to -0.2V in 100mV resolution
ACVCOM: 3-level outputs (VSH1+DCVCOM, DCVCOM, VSL+DCVCOM)
On-chip oscillator, adjustable frame rate from 25Hz to 200Hz
Programmable output Waveform Settings:
Individual setting of 5 LUT [LUT0~4]
- VS: 2-bit per 4 phases
Common setting of 5 LUT
- 48 phases (4 phases/group, 12 groups with repeat and state repeat function)
- TP: Max. 255 frame/phase
- RP: 1 to 256 times for repeat count
- SR: 1 to 256 times for state repeat count; state repeat count for phase A,B and 1 state
repeat count for phase C,D
- FR: Selective Frame Rate for each group
Embedded OTP to store the waveform settings and parameters:
36 sets of Waveform Settings (WS) including
- waveform look up table (LUT),
- Gate/Source voltage, VCOM value
- Option for LUT end
36 sets of Temperature Range (TR)
Display mode selection
4-byte waveform version
10-byte User ID
Embedded OTP to store the init code setting
VCI low voltage detection
Internal Temperature Sensor of +/-2degC accuracy from -25degC to 50degC
I2C single master interface to communicate with external temperature sensor
MCU interface: 4-wire or 3-wire Serial peripheral interface (maximum SPI write speed 20MHz)
Available in COG package
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