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i.MX 8M Quad Power Consumption

Measurement

1. Introduction

This application note helps you to design power

management systems. It illustrates the current drain

measurements of the i.MX 8M application processors

taken on the NXP EVK platform through several use

cases. You may choose the appropriate power supply

domains for the i.MX 8M Quad chips and become

familiar with the expected chip power in various

scenarios.

Because the data presented in this application note is

based on empirical measurements taken on a small

sample size, the presented results are not guaranteed.

NXP Semiconductors

Document Number: AN12118

Application Note

Rev. 2

08/2018

Contents

1. Introduction......................................................................... 1

2. Overview of i.MX 8M Quad voltage supplies.................... 2

3. Internal power measurement of the i.MX 8M Quad

processor ............................................................................. 5

4. Use cases and measurement results .................................... 8

5. Reducing Power Consumption ......................................... 29

6. Use Case Configuration and Usage Guidelines ................ 30

7. Revision history ................................................................ 51

Internal power measurement of the i.MX 8M Quad processor

i.MX 8M Quad Power Consumption Measurement, Application Note, Rev. 2, 08/2018

NXP Semiconductors 5

3. Internal power measurement of the i.MX 8M Quad

processor

Several use cases (described in Section 6, “Use Case Configuration and Usage Guidelines”) are run on

the EVK platform (Revision D). The measurements are taken mainly for these power supply domains:

• VDD_ARM: ARM

Cortex

-A53 Quad cores supply.

• VDD_SOC: SoC logic supply.

• VDD_GPU: GPU power supply.

• VDD_DRAM: DRAM controller, PHY, and PLL power supply.

• VDD_VPU: VPU power supply.

• NVCC_DRAM: DRAM IO power supply (including an external DDR device).

These supply domains consume the majority of the processor’s internal power. For relevant use cases,

the power of additional supply domains is added. However, the power of these supply domains does not

depend on specific use cases, but on whether these modules are used or not. The power consumption of

the SNVS is comparatively negligible (except for the Deep-Sleep Mode).

The NVCC_* power consumption depends primarily on the board-level configuration and the

components. Therefore, it is not included in the i.MX 8M Quad internal power analysis.

The power consumption of these supplies (in different use cases) is provided in Table 2 through to Table

33.

NOTE

Unless stated otherwise, all measurements were taken on a typical process

silicon, at a room temperature (approximately 25 °C).

3.1. VDDA_1P8 power

The VDDA_1P8 voltage domain is generated from the PMIC. This domain powers these circuits:

• On-chip oscillators (OSC25M, OSC27M).

• eFuse power supplies.

• Analog part of the PLLs.

• Temperature sensor.

3.2. DDR I/O power

The DDR I/O is supplied from the NVCC_DRAM which provides the power for the DDR I/O pads. The

target voltage for this supply depends on the DDR interface used. The target voltages for the different

DDR interfaces are:

• 1.35 V for DDR3L.

• 1.2 V for DDR4/LPDDR3.

• 1.1 V for LPDDR4.

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