intel fpga opencl 编程指南

所需积分/C币:24 2017-09-06 23:21:17 1000KB PDF
收藏 收藏 1
举报

intel fpga opencl 编程指南 The Intel® FPGA SDK for OpenCL™ Programming Guide provides descriptions, recommendations and usage information on the Intel Software Development Kit (SDK) for OpenCL compiler and tools. The Intel FPGA SDK for OpenCL1 is an OpenCL2-based heterogeneous parallel programming envir
intel 1.8. 4 Specifying the Name of an Intel FPGA SDK for Open CL Offline Compiler Output File(o<filename>) n1nt国1自面“面 道1面 7 1.8. 5 Compiling a kernel for a Specific FPga Board (--board <board name>)...97 1.8.6 Resolving Hardware generation Fitting Errors during Kernel compilation high-effort 99 8.7 Defining Preprocessor Macros to Specify Kernel Parameters (-D <macro name> 99 1. 8. 8 Generating Compilation Progress Report(v)......... 1面 101 8.9 displaying the estimated resource Usage Summary on-Screen(--report)..102 1.8.10 Suppressing Warning Messages from the Intel FPGA SDK for OpenCL Offline Compiler(-W) 102 1. 8. 11 Converting Warning Messages from the Intel FPGA SDK for OpenCL Offline Compiler into Error Messages(- Werror).………,………,……102 1.8. 12 Removing debug data from Compiler Reports and Source Code from the. docx File(go) 103 1.8. 13 Disabling Burst-Interleaving of Global Memory (--no-interleaving <global_memory type>). ∴103 1. 8. 14 Configuring Constant Memory Cache Size(--const-cache-bytes <N>).... 104 8.15 Relaxing the Order of Floating-Point Operations (--fp-relaxed.........104 1.8. 16 Reducing Floating-Point Rounding operations (--fpc 105 1.9 Emulating and Debugging Your OpenCL Kern 105 1.9.1 Modifying Channels Kernel Code for Emulation.…,……,……106 1.9.2 Compiling a Kernel for Emulation (-march =emulator) 107 1.9.3 Emulating Your OpenCL Kernel....... .109 1.9.4 Debugging Your OpenCL Kernel on Linux.……………………110 1.9.5 Limitations of the intel FPGa SDK for Open CL emulate 111 1. 10 Reviewing Your Kernel's report html File 1. 11 Profiling your open cl Kernel 112 1. 11.1 Instrumenting the Kernel Pipeline with Performance Counters(--profile)... 113 1.11.2 Launching the Intel FPGA SDK for OpenCL Profiler GUI (report) ∴113 1.12 Conclusion 113 1.13 Document Revision History. 114 2 Intel FPGA SDK for OpenCL Advanced Features.…………………………:120 2.1 OpenCL Library. 120 2.1.1 Understanding rtl modules and the openCL Pipeline.. 2.1.2 Packaging an OpenCL Helper Function File for an OpenCL libl 131 2.1.3 Packaging an RTL Component for an OpenCL Library ∴.132 2.1.4 Verifying the RtL Modules,…,,…,…,,…,,,…,,……,……,,135 2.1.5 Packaging Multiple object Files into a Library File. 135 2. 1. 6 Specify ing an OpenCL Library when Compiling an OpenCL Kernel 135 2. 1.7 Using an OpenCL Library that Works with Simple Functions(Example 1).........136 2.1.8 Using an OpenCL Library that Works with External Memory(Example 2)........ 137 2.1.9 Open CL Library Command-Line Options. 11面 ∴138 2.2 Kernel attributes for confi System 139 2. 2. 1 Restrictions on the Usage of Local Variable-Specific Kernel Attributes 141 2.3 Kernel Attributes for Reducing the Overhead on Hardware Usage. . 2.3.1 Hardware for Kernel interface 142 2. 4 Kernel Replication Using the num_compute_units(X,Y,Z) Attribute. ............145 2. 4. 1 Customization of Replicated Kernels Using the get_compute_ido Function. .....146 2.4.2 Using Channels with Kernel Copies................... 147 2. 5 Document Revision 148 Intel@ FPGA SDK for OpenCL Programming guide intel Contents A Support Statuses of Open CL Features……………………;………:149 A.1 Support statuses of OpenCL1.0 Features.….…..……..…….149 A.1.1 OpenCL1.0 C Programming Language Implementation.…………149 A.1.2 Open CL C programming Language restrictions ∴,151 A.1.3 Argument Types for Built-in Geometric Functions. A 1. 4 Numerical Compliance Implementation .153 A 1.5 Image Addressing and Filtering Implementation 153 A, 1. 6 Atomic functions 153 A 1.7 Embedded profile implementation ∴154 A2 Support Statuses of OpenCL 1.2 Features........... 154 A.2.1 OpenCL 1.2 Runtime Implementation . ∴,154 A.2.2 Open CL 1.2C Programming Language implementation. ............ 155 A 3 Support statuses of OpenCL 2.0 Features 156 A.3. 1 OpenCL 2.0 Headers 重 156 A.3.20 penCE2.0 Runtime Implementation.…,…,,,,,,……156 A.3.3 OpenCL 2.0 C Programming Language Restrictions for Pipes. A 4 Intel FPGA SDK for openCL Allocation Limits 157 A. 5 Document Revision History 158 Intel@ FPGA SDK for openCL Programming guide 4 1 Inte/o FPGA SDK for OpenCL Programming Guide intel 1 Intel@ FPGA SDK for OpenCL Programming Guide The Inte/@ FPGA SDK for OpenCL Programming Guide provides descriptions recommendations and usage information on the intel Software development kit (SDk) for openCL compiler and tools. the intel FPGA SDK for opencl l is an opencl2-based heterogeneous parallel programming environment for Intel FPGA products 1.1 Intel FPGA SDK for OpenCL Programming Guide Prerequisites The Intel FPGA SDK for OpenCL Programming Guide assumes that you are knowledgeable in OpenCL concepts and application programming interfaces(APIs). It also assumes that you have experience creating open CL applications and are familiar with the openCL specification version 1.0. Before using the Intel FPGA SDK for OpenCL or the Intel FPGA Runtime Environment (RTE for OpenCL to program your device familiarize yourself with the respective getting started guides. this document assumes that you have performed the following tasks For developing and deploying open CL kernels, download the tar file and run the installers to install the sdk, the Quartus Prime software and device support For deployment of openCl kernels, download and install the rte. If you want to use the sdk or the rte to program a cyclone e v Soc development Kit, you also have to download and install the soc embedded design Suite(eds). Install and set up your FPGa board Program your device with the device-compatible version of the hello_world example OpenCL application If you have not performed the tasks described above, refer to the sDK's getting starting guides for more information Prior to creating an Open Cl design and programming your FPGa board, review the Intel FPGA SDK for OpenCl allocation limits Related Links Intel FPGA SDK for Open CL Allocation Limits on page 157 OpencL References pages 1 The intel FPGa SDK for OpenCL is based on a published khronos specification and has passed the khronos conformance testing process. current conformance status can be found at www.khronos.org/conformance 2 OpenCL and the Open CL logo are trademarks of Apple Inc. used by permission of the khronos group Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios Quartus countries. Intel warrants performance of its FPGa and semiconductor products to current specifications in Iso accordance with Intel's standard warranty but reserves the right to make changes to any products and services 9001:2008 at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any Registered information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. *Other names and brands may be claimed as the property of others intel 1 Inte/ FPGA SDK for OpencL Programming Guide Open CL Specification version 1.0 Intel FPGA SDK for Open CL Getting Started Guide Intel FPGA RTE for OpenCL Getting Started Guide Intel FPGA SDK for Open CL Cyclone V SoC Getting Started Guide 1.2 Intel FPGA SDK for OpenCL FPGA Programming Flow The Intel FPGA SDK for OpenCL programs an FPga with an Open Cl application in a tWo-step process. The Intel FPGA SDK for OpenCL Offline Compiler first compiles your OpenCL kernels. The host-side c compiler compiles your host application and then links the compiled opencl kernels to it Figure 1. Schematic Diagram of the Intel FPGA SDK for openCL Programming Model Host Code path Kernel (ode path Custom Platform Path ntel FPGA for OpenCl Host source code Kernel source code customize to intel Pga SdK for OpencL Runtime environment .cDr. cpp) (c Custom Platform Design target Reference Platform Design platforn Quartus Prime Host compile SDK Offline Compiler Design Suite SDK's board directory Host binary FPGA image(aoc for version compatibl target platform Execute host n hast Runtime execution □ Board developer-created item□ SDKuser-created item□ Intel-supplied tool or design□ oard deve oper-supplied ite Third-party-supplied or open source tool [Tool-generated item O Process or action Three main parts in the sDK's programming model: The host application and the host compiler The Open Cl kernel and the offline compiler The custom platform The Custom Platform provides the board design the offline compiler targets the board design when compiling the Opencl kernel to generate the hardware image. The host then runs the host application to execute the hardware image onto the fPga. Intel@ FPGA SDK for opencL Programming Guide 6 1 Inte/o FPGA SDK for OpenCL Programming Guide intel 1.3 Intel FPGA SDK for OpenCL Offline Compiler Kernel Compilation Flows The Intel FPGA SDK for Open CL Offline Compiler can create your FPga hardware configuration file in a one-step or a multistep process. the complexity of your kernel dictates the compilation option you implement. Figure 2. The Intel FPGA SDK for OpenCL FPGA Programming Flow Kernel Source Kernel Source Kernel Source Host code Code #1( c) ode #2(c) Code #3( cl) I Kernel Source Kernel Source Kernel So 〔de#ode5d)(e6(d Offline Compiler for Standard OpenCl Kernels 〔( compiler Offline compiler for OpenCl Kernels Consolidated Kernel Binary a Laoco, . ocx) Host Binary Consolidated Kernel Binary B Casco,. docx) Load ocx into memo Kernel Binary b docx ● Load runtime PCle Kernel binary a a0cx Load until Intel@ FPGA SDK for OpenCL Programming guide intel 1 Inte/ FPGA SDK for OpencL Programming Guide An OpenCl kernel source file (. cl contains your OpenCL source code. The offline compiler groups one or more kernels into a temporary file and then compiles this file to generate the following files and folders A. aoco object file is an intermediate object file that contains information for later stages of the compilation A. aocx executa ble file is the hardware configuration file and contains information necessary at runtime The <your kernel filename> folder or subdirectory, which contains data necessary to create the. docx file The offline compiler creates the. aocx file from the contents of the syour kernel filename> folder or subdirectory. It also incorporates information from the aoco file into the aocx file during hardware compilation the. aocx file contains data that the host application uses to create program objects for the target FPGA. The host application loads these program objects into memory. The host runtime then calls these program objects from memory and programs the target FPGA as required 1.3.1 One-Step Compilation for simple Kernels By default, the Intel FPGA SDK for OpenCL Offline Compiler compiles your OpenCL kernel and creates the hardware configuration file in a single step. Choose this compilation option only if your Open CL application requires minimal optimizations The following figure illustrates the OpenCl kernel design flow that has a single compilation step Figure 3. One-Step OpenCL Kernel Compilation Flow <your kernel_ filename>d aoc <your kernel filename> c[--report Duration of compilation: hours syour__kernel_filename>aoco Estimated resource usage summary in syour kernel filename>. log <your_kernel_filename>aoa Optimization report in (and on-screen with --report) <your kernel_ filename>. log NO/Resource usageYES ute on work-item kernen NO acceptable? performance satisfactor Legend ile abc Command Kernel Execution abc For single work-item kernel Intel@ FPGA SDK for opencL Programming Guide 8 1 Inte/o FPGA SDK for OpenCL Programming Guide intel A successful compilation results in the following files and reports A. aoco file A. ocx file In the <your kernel filename>/<your kernel filename>. log file the estimated resource usage summary provides a preliminary assessment of area usage. If you have a single work-item kernel, the optimization report identifies performance bottlenecks Attention: It is very time consuming to iterate on your design using the one-step compilation flow. For each iteration you must perform a full compilation, which takes hours. then you must execute the kernel on the fpga before you can assess its performance Related Links Compiling Your Kernel to Create Hardware Configuration File on page 95 You can compile an Opencl kernel and create the hardware configuration file (that is, the . aocx file) in a single step 1.3.2 Multistep Intel FPGA SDK for OpenCL Design Flow Choose the multistep Intel FPGA SDK for OpenCl design flow if you want to iterate on your OpencL kernel design to implement performance-improving optimizations The figure below outlines the stages in the SdK's design flow. the steps in the design flow serve as checkpoints for identify ing functional errors and performance bottlenecks. They allow you to modify your openCl kernel code without performing a full compilation after each iteration Intel@ FPGA SDK for OpenCL Programming guide intel 1 Inte/ FPGA SDK for OpencL Programming Guide Figure 4. The Multistep Intel FPGA SDK for OpenCL Design Flow <your kernd filename> Intermediate Compilation YEs Syntactic> <your_kernel_ filename>aoco Estimated resource usage summary our kernel filename>,aoco your_ kernel_ filename>log (end on-screen with -report <your kernel filename>. log Dura ion of complation: seconds Execute on <your_ kernel_ filename>.ocx work item kernel? Review HTML Kepo <your hernel filename>/reports/eport. html Estimate」kem erformance data Profiling Duration of compilation: hours syour kernel filename>accx syour kernel filename>.sour file. kermel_filename>.aoc profile. mor aoc repcrt <your kernel filename>source 〔 ormand abc Single work-item kernel step aoc<your_kernel_filename.≥d Duration of compilation: hours <your kernel filename>ocx Execute kernel on FPGA The SDK's design flow includes the following steps 1. Intermediate compilation The intermediate compilation step checks for syntatic errors. It then generates a, aoco file without building the hardware configuration file. the estimated resource usage summary in the <your kernel filename> <your kernel filename>. log file can provide insight into the type of kernel optimizations you can perform Intel@ FPGA SDK for opencL Programming Guide 10

...展开详情
试读 127P intel fpga opencl 编程指南
立即下载 低至0.43元/次 身份认证VIP会员低至7折
    抢沙发
    一个资源只可评论一次,评论内容不能少于5个字
    • 签到新秀

      累计签到获取,不积跬步,无以至千里,继续坚持!
    关注 私信 TA的资源
    上传资源赚积分,得勋章
    最新推荐
    intel fpga opencl 编程指南 24积分/C币 立即下载
    1/127
    intel fpga opencl 编程指南第1页
    intel fpga opencl 编程指南第2页
    intel fpga opencl 编程指南第3页
    intel fpga opencl 编程指南第4页
    intel fpga opencl 编程指南第5页
    intel fpga opencl 编程指南第6页
    intel fpga opencl 编程指南第7页
    intel fpga opencl 编程指南第8页
    intel fpga opencl 编程指南第9页
    intel fpga opencl 编程指南第10页
    intel fpga opencl 编程指南第11页
    intel fpga opencl 编程指南第12页
    intel fpga opencl 编程指南第13页
    intel fpga opencl 编程指南第14页
    intel fpga opencl 编程指南第15页
    intel fpga opencl 编程指南第16页
    intel fpga opencl 编程指南第17页
    intel fpga opencl 编程指南第18页
    intel fpga opencl 编程指南第19页
    intel fpga opencl 编程指南第20页

    试读已结束,剩余107页未读...

    24积分/C币 立即下载 >