QM_XC6SLX16_DDR3 Core Board User Manual V01
QM_XC6SLX16_DDR3 CORE BOARD
USER MANUAL
Preface
The QMTech® XC6SLX16 DDR3 core board uses Xilinx’s Spartan®-6 XC6SLX16-2FTG256C device to
demonstrate industry leading connectivity features such as high logic-to-pin ratios, small form-factor
packaging, MicroBlaze™ soft processor, 800Mb/s DDR3 support, and a diverse number of supported I/O
protocols. Built on 45nm technology, the devices are ideally suited for advanced bridging applications found
in automotive infotainment, consumer, and industrial automation.
QM_XC6SLX16_DDR3 Core Board User Manual V01
Table of Contents
1. INTRODUCTION .................................................................................. 3
1.1 DOCUMENT SCOPE ..................................................................... 3
1.2 KIT OVERVIEW ........................................................................... 3
2. GETTING STARTED .............................................................................. 4
2.1 INSTALL DEVELOPMENT TOOLS ...................................................... 5
2.2 QM_XC6SLX16_DDR3 HARDWARE DESIGN ................................. 6
2.2.1 QM_XC6SLX16_DDR3 Power Supply .......................... 6
2.2.2 QM_XC6SLX16_DDR3 SPI Boot ................................... 7
2.2.3 QM_XC6SLX16_DDR3 Memory .................................. 9
2.2.4 QM_XC6SLX16_DDR3 System Clock ........................... 9
2.2.5 QM_XC6SLX16_DDR3 Extension IO .......................... 10
2.2.1 QM_XC6SLX16_DDR3 3.3V Power Supply................. 11
2.2.2 QM_XC6SLX16_DDR3 JTAG Port .............................. 11
2.2.3 QM_XC6SLX16_DDR3 User LED ................................ 11
2.2.4 QM_XC6SLX16_DDR3 User Key ................................ 12
3. REFERENCE........................................................................................ 13
4. REVISION .......................................................................................... 14
QM_XC6SLX16_DDR3 Core Board User Manual V01
1. Introduction
1.1 Document Scope
This demo user manual introduces the QM_XC6SLX16_DDR3 core board and describes how to setup
the core board running with application software Xilinx ISE 14.7. Users may employee the on board rich
logic resource FPGA XC6SLX16-2FTG256C and large DDR3 memory MT41J128M16JT-125 to
implement various applications. The core board also has 108 non-multiplexed FPGA IOs for extending
customized modules, such as UART module, CMOS/CCD camera module, LCD/HDMI/VGA display
module etc.
1.2 Kit Overview
Below section lists the parameters of the QM_XC6SLX16_DDR3 core board:
On-Board FPGA: XC6SLX16-2FTG256C;
On-Board FPGA external crystal frequency: 50MHz;
XC6SLX16-2FTG256C has rich block RAM resource up to 576Kb;
XC6SLX16-2FTG256C has 14,579 logic cells;
On-Board M25P80 SPI Flash，1M bytes for user configuration code;
On-Board 256MB Micron DDR3, MT41J128M16JT-125;
On-Board 3.3V power supply for FPGA by using MP2359 wide input range DC/DC;
XC6SLX16 development board has two 64p, 2.54mm pitch headers for extending user IOs. All IOs
are precisely designed with length matching;
XC6SLX16 development board has 3 user switches;
XC6SLX16 development board has 4 user LEDs;
XC6SLX16 development board has JTAG interface, by using 6p, 2.54mm pitch header;
XC6SLX16 development board PCB size is: 6.7cm x 8.4cm;
Default power source for board is: 1A@5V DC, the DC header type: DC-050, 5.5mmx2.1mm;
Figure 1-1. QM_XC6SLX16_DDR3 Core Board Overview
QM_XC6SLX16_DDR3 Core Board User Manual V01
2. Getting Started
The QM_XC6SLX16_DDR3 core board includes below item:
Figure 2-1. QM_XC6SLX16_DDR3 Top View
Below image shows the dimension of the QM_XC6SLX16_DDR3 core board: 6.7cm x 8.4cm. The unit in
below image is millimeter(mm).
QM_XC6SLX16_DDR3 Core Board User Manual V01
Figure 2-2. QM_XC6SLX16_DDR3 Core Board Dimension
2.1 Install Development Tools
The QM_XC6SLX16_DDR3 core board tool chain consists of Xilinx ISE 14.7, Xilinx USB platform cable,
XC6SLX16 core board and 5V DC power supply. Below image shows the Xilinx ISE14.7 development
environment which could be downloaded from Xilinx office website:
Figure 2-3. ISE 14.7
Below image shows the JTAG connection between Xilinx USB platform cable and XC6SLX16 core board:
