FPGA Spartan6开发原理图
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2014-04-12
21:25:15
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ofSheet
Date:
Title:
Ver:
A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
GPIO Headers
Page 10
U1
Page 8
3.0V@500mA max
Linear Regulator
Monolithic Regulator
0.9V@3A max
Dual Switcher
TDI
PWR
Jack
TDO
JTAG Chain
SCHEM, ROHS COMPLIANT
5V
FMC LPC Expansion
Connector GMII
Differential Clock
Clock Socket
SMA Clock
LEDs
DIP Switches
TDI
FPGA
FMC Expansion
MODE DIP Switch
Push Buttons
SP601 EVALUATION PLATFORM
TDO
USB UART
3.3V@8A max
Dual Switcher
1.2V@8A max
1.8V@8A max
2.5V@8A max
Buck-Boost Regulator
Power Supply
JTAG or
USB HDR
EEPROM:
External Config
12V@1A max
Other Devices:
DDR2
Page 5
Page 6 Page 7
Parallel Flash
Page 8
USB JTAG Connector
Page 14Page 10Page 8
IIC EEPROM
and Header
Page 10
Page 9
Page 9
Page 9
Page 9
SPI X4 or
0b1010010
0bXXXXX10
J1
0b1010000U5
J1
J2 or J3
XC6SLX16
U1
SP601 Block Diagram
ART P/N: 1280464
PCB P/N: 0431512
SCH P/N: 0381290
Test P/N: TSS0121
Spartan-6
J4
IIC Addresssing
10/100/1000 Ethernet
WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR
ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE XILINX DATA
SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE, OR FOR
USE IN ANY APPLICATION REQUIRING FAIL-SAFE PERFORMANCE, SUCH
AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION
THAT INVOKES THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY OR PROPERTY
OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). USE OF PRODUCTS
IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS. ALL SPECIFICATIONS ARE SUBJECT TO
ARE SUBJECT TO THE TERMS AND CONDITIONS OF THE XILINX LIMITED WARRANTY
CHANGE WITHOUT NOTICE.
THE XILINX HARDWARE, FPGA AND CPLD DEVICES REFERRED TO HEREIN ("PRODUCTS")
Disclaimer:
BF
01
1 16
8-14-2009_16:47
C
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DeepBlue932014-12-01很好的资源，谢谢分享
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