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DS28E01中文资料
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2019-01-19
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DS28E01中文资料。
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本文是英文数据资料的译文,文中可能存在翻译上的不准确或错误。如需进一步确认,请在您的设计中参考英文资料。
有关价格、供货及订购信息,请联络Maxim亚洲销售中心:10800 852 1249 (北中国区),10800 152 1249 (南中国区),
或访问Maxim的中文网站:china.maximintegrated.com。
AVAILABLE
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PART TEMP RANGE PIN-PACKAGE
DS28E01P-100+ -40°C to +85°C 6 TSOC
DS28E01P-100+T -40°C to +85°C 6 TSOC
DS28E01G-100+T&R -40°C to +85°C 2 SFN
DS28E01Q-100+T&R -40°C to +85°C
6 TDFN-EP*
(2.5k pcs)
IO
R
PUP
V
CC
μC
GND
DS28E01-100
DS28E01-100
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ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(T
A
= -40°C to +85°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IO Voltage Range to GND .......................................-0.5V to +6V
IO Sink Current ...................................................................20mA
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-55°C to +125°C
Lead Temperature (TSOC, TDFN only; soldering, 10s)...+300°C
Soldering Temperature (reflow)
TSOC, TDFN .................................................................+260°C
SFN .......Refer to Application Note 4132: Attachment Methods
for the Electro-Mechanical SFN Package.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
IO PIN: GENERAL DATA
1-Wire Pullup Voltage V
PUP
(Note 2) 2.8 5.25 V
1-Wire Pullup Resistance R
PUP
(Notes 2, 3) 0.3 2.2 k
Input Capacitance C
IO
(Notes 4, 5) 1000 pF
Input Load Current I
L
IO pin at V
PUP
0.05 6.7 μA
High-to-Low Switching Threshold V
TL
(Notes 5, 6, 7) 0.46
V
PUP
-
1.8
V
Input Low Voltage V
IL
(Notes 2, 8) 0.5 V
Low-to-High Switching Threshold V
TH
(Notes 5, 6, 9) 1.0
V
PUP
-
1.1
V
Switching Hysteresis V
HY
(Notes 5, 6, 10) 0.21 1.70 V
Output Low Voltage V
OL
At 4mA current load (Note 11) 0.4 V
Standard speed, R
PUP
= 2.2k 5
Overdrive speed, R
PUP
= 2.2k 2
Recovery Time
(Notes 2,12)
t
REC
Overdrive speed, directly prior to reset
pulse; R
PUP
= 2.2k
5
μs
Standard speed 0.5 5.0
Rising-Edge Hold-Off Time
(Notes 5, 13)
t
REH
Overdrive speed Not applicable (0)
μs
Standard speed 65
Time Slot Duration
(Notes 2, 14)
t
SLOT
Overdrive speed 8
μs
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
Standard speed 480 640
Reset Low Time (Note 2) t
RSTL
Overdrive speed 48 80
μs
Standard speed 15 60
Presence-Detect High Time t
PDH
Overdrive speed 2 6
μs
Standard speed 60 240
Presence-Detect Low Time t
PDL
Overdrive speed 8 24
μs
Standard speed 60 75
Presence-Detect Sample Time
(Notes 2, 15)
t
MSP
Overdrive speed 6 10
μs
DS28E01-100
2
Maxim Integrated
2
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +85°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
IO PIN: 1-Wire WRITE
Standard speed 60 120
Overdrive speed, V
PUP
> 4.5V 5 15.5
Write-Zero Low Time
(Notes 2, 16, 17)
t
W0L
Overdrive speed 6 15.5
μs
Standard speed 1 15
Write-One Low Time
(Notes 2, 17)
t
W1L
Overdrive speed 1 2
μs
IO PIN: 1-Wire READ
Standard speed 5 15 -
Read Low Time
(Notes 2, 18)
t
RL
Overdrive speed 1 2 -
μs
Standard speed t
RL
+ 15
Read Sample Time
(Notes 2, 18)
t
MSR
Overdrive speed t
RL
+ 2
μs
EEPROM
Programming Current I
PROG
(Notes 5, 19) 0.8 mA
Programming Time t
PROG
(Note 20) 10 ms
At +25°C 200k
Write/Erase Cycles (Endurance)
(Notes 21, 22)
N
CY
At +85°C (worst case) 50k
Data Retention
(Notes 23, 24, 25)
t
DR
At +85°C (worst case) 40 Years
SHA-1 ENGINE
Computation Current I
LCSHA
mA
Computation Time
(Notes 5, 26)
t
CSHA
ms
Note 1: Specifications at T
A
= -40°C are guaranteed by design only and not production tested.
Note 2: System requirement.
Note 3: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times.
The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more
heavily loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be required.
Note 4: Maximum value represents the internal parasite capacitance when V
PUP
is first applied. If a 2.2kΩ pullup resistor is used,
the parasite capacitance does not affect normal communications 2.5μs after V
PUP
has been applied.
Note 5: Guaranteed by design, characterization, and/or simulation only. Not production tested.
Note 6: V
TL
, V
TH
, and V
HY
are a function of the internal supply voltage, which is a function of V
PUP
, R
PUP
, 1-Wire timing, and
capacitive loading on IO. Lower V
PUP
, higher R
PUP
, shorter t
REC
, and heavier capacitive loading all lead to lower values of
V
TL
, V
TH
, and V
HY
.
Note 7: Voltage below which, during a falling edge on IO, a logic 0 is detected.
Note 8: The voltage on IO must be less than or equal to V
ILMAX
at all times the master is driving IO to a logic 0 level.
Note 9: Voltage above which, during a rising edge on IO, a logic 1 is detected.
Note 10: After V
TH
is crossed during a rising edge on IO, the voltage on IO must drop by at least V
HY
to be detected as logic 0.
Note 11: The I-V characteristic is linear for voltages less than 1V.
Note 12: Applies to a single device attached to a 1-Wire line.
Note 13: The earliest recognition of a negative edge is possible at t
REH
after V
TH
has been reached on the preceding rising edge.
Note 14: Defines maximum possible bit rate. Equal to t
W0LMIN
+ t
RECMIN
.
Note 15: Interval after t
RSTL
during which a bus master is guaranteed to sample a logic 0 on IO if there is a DS28E01-100 present.
Minimum limit is t
PDHMAX
; maximum limit is t
PDHMIN
+ t
PDLMIN
.
Note 16: Numbers in bold are not in compliance with legacy 1-Wire product standards. See the Comparison Table.
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Refer to the full data sheet.
Maxim Integrated
3
DS28E01-100
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Note 17: ε in Figure 12 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to V
TH
. The actual
maximum duration for the master to pull the line low is t
W1LMAX
+ t
F
- ε and t
W0LMAX
+ t
F
- ε, respectively.
Note 18: δ in Figure 12 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to the input-high
threshold of the bus master. The actual maximum duration for the master to pull the line low is t
RLMAX
+ t
F
.
Note 19: Current drawn from IO during the EEPROM programming interval or SHA-1 computation.
Note 20:
Note 21: Write-cycle endurance is degraded as T
A
increases.
Note 22: Not 100% production tested; guaranteed by reliability monitor sampling.
Note 23: Data retention is degraded as T
A
increases.
Note 24: Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the
data sheet limit at operating temperature range is established by reliability testing.
Note 25: EEPROM writes can become nonfunctional after the data-retention time is exceeded. Long-term storage at elevated tem-
peratures is not recommended; the device can lose its write capability after 10 years at +125°C or 40 years at +85°C.
Note 26:
࣪ᑍܭ
LEGACY VALUES DS28E01-100 VALUES
STANDARD SPEED
(μs)
OVERDRIVE SPEED
(μs)
STANDARD SPEED
(μs)
OVERDRIVE SPEED
(μs)
PARAMETER
MIN MAX MIN MAX MIN MAX MIN MAX
t
SLOT
(including t
REC
) 61 (undefined) 7 (undefined) 65* (undefined) 8* (undefined)
t
RSTL
480 (undefined) 48 80 480 640 48 80
t
PDH
15 60 2 6 15 60 2 6
t
PDL
60 240 8 24 60 240 8 24
t
W0L
60 120 6 16 60 120 6 15.5
*
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ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +85°C.) (Note 1)
Refer to the full data sheet for this note.
Refer to the full data sheet for this note.
DS28E01-100
4
Maxim Integrated
4
TSOC TDFN-EP SFN
1 3 2 GND
2 2 1 IO
3, 4, 5, 6 1, 4, 5, 6 — N.C.
— EP — EP
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ă
Maxim Integrated
5
DS28E01-100
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资源评论
- xtulcl2019-09-27还行,谢谢分享!
- qq_338849112019-09-03还不错,是中文的
- einsteinz2019-09-15不错,可以参考
wabonly
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