Release 14.7 - par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Sun Nov 19 19:30:43 2017
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors.
2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information.
3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator.
INPUT FILE: uart_tx_top_map.ncd
OUTPUT FILE: uart_tx_top_pad.txt
PART TYPE: xc3s100e
SPEED GRADE: -5
PACKAGE: cp132
Pinout by Pin Number:
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|Pin Number|Signal Name|Pin Usage|Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage |Constraint|IO Register|Signal Integrity|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|A1 | | |PROG_B | | | | | | | | | | | |
|A2 | | |TDI | | | | | | | | | | | |
|A3 | |DIFFM |IO_L11P_0 |UNUSED | |0 | | | | | | | | |
|A4 | | |NC | | | | | | | | | | | |
|A5 | | |VCCAUX | | | | | | | |2.5 | | | |
|A6 | | |VCCO_0 | | |0 | | | | |2.50 | | | |
|A7 | |DIFFM |IO_L07P_0/GCLK10 |UNUSED | |0 | | | | | | | | |
|A8 | | |GND | | | | | | | | | | | |
|A9 | |DIFFS |IO_L05N_0/GCLK7 |UNUSED | |0 | | | | | | | | |
|A10 | |DIFFM |IO_L04P_0/GCLK4 |UNUSED | |0 | | | | | | | | |
|A11 | | |VCCINT | | | | | | | |1.2 | | | |
|A12 | | |NC | | | | | | | | | | | |
|A13 | |DIFFM |IO_L01P_0 |UNUSED | |0 | | | | | | | | |
|A14 | | |TDO | | | | | | | | | | | |
|B1 | |DIFFS |IO_L01N_3 |UNUSED | |3 | | | | | | | | |
|B2 | |DIFFM |IO_L01P_3 |UNUSED | |3 | | | | | | | | |
|B3 | |DIFFS |IO_L11N_0/HSWAP |UNUSED | |0 | | | | | | | | |
|B4 | |IBUF |IP |UNUSED | |0 | | | | | | | | |
|B5 | |DIFFM |IO_L09P_0 |UNUSED | |0 | | | | | | | | |
|B6 | |DIFFM |IO_L08P_0 |UNUSED | |0 | | | | | | | | |
|B7 | |DIFFS |IO_L07N_0/GCLK11 |UNUSED | |0 | | | | | | | | |
|B8 |Clk |IBUF |IP_L06P_0/GCLK8 |INPUT |LVCMOS25* |0 | | | |NONE | |LOCATED |NO |NONE |
|B9 | |DIFFM |IO_L05P_0/GCLK6 |UNUSED | |0 | | | | | | | | |
|B10 | | |VCCO_0 | | |0 | | | | |2.50 | | | |
|B11 | | |NC | | | | | | | | | | | |
|B12 | | |NC | | | | | | | | | | | |
|B13 | | |TCK | | | | | | | | | | | |
|B14 | | |TMS | | | | | | | | | | | |
|C1 | | |NC | | | | | | | | | | | |
|C2 | |DIFFS |IO_L02N_3 |UNUSED | |3 | | | | | | | | |
|C3 | |DIFFM |IO_L02P_3 |UNUSED | |3 | | | | | | | | |
|C4 | | |NC | | | | | | | | | | | |
|C5 |Rs232_Tx |IOB |IO_L09N_0 |OUTPUT |LVCMOS25* |0 |12 |SLOW |NONE** | | |LOCATED |NO |NONE |
|C6 | |DIFFS |IO_L08N_0/VREF_0 |UNUSED | |0 | | | | | | | | |
|C7 | | |GND | |
基于FPGA的串口收发（Basys2） （260个子文件） 
_1 4KB _1 3KB uart_tx_top.bgn 5KB uart__byte__tx.bin 10KB uart__receive.bin 7KB uatr__send.bin 7KB uart__tx__top.bin 3KB top__uart.bin 3KB clk__receive.bin 3KB clk__send.bin 3KB uart_tx_top.bit 71KB uart_tx_top.bld 1KB top_uart.bld 263B m_00000000003586951895_3113203713.c 34KB m_00000000002361773369_0156449476.c 24KB m_00000000002656529423_2179171295.c 12KB m_00000000004134447467_2073120511.c 8KB m_00000000004134447467_2073120511.c 8KB m_00000000002722144201_3825996588.c 8KB m_00000000001951949339_0828849418.c 7KB tb_receive_isim_beh.exe_main.c 1KB tb_Uart_Send_isim_beh.exe_main.c 1KB m_00000000003312836325_0934858945.c 1KB UART_SEND.cfi 459B NEW.cfi 453B fuseRelaunch.cmd 252B fuseRelaunch.cmd 204B isim.cmd 44B isim.cmd 44B uart_tx_top.cmd_log 6KB top_uart.cmd_log 2KB gen_test.cmd_log 2KB tb_Uart_Send.cmd_log 244B uart_tx_top_pad.csv 6KB top_uart_pad.csv 6KB netId.dat 252B netId.dat 52B ISimEngine-DesignHierarchy.dbg 6KB ISimEngine-DesignHierarchy.dbg 6KB planAhead_pid133116.debug 4KB planAhead_pid120124.debug 4KB m_00000000004134447467_2073120511.didat 5KB m_00000000004134447467_2073120511.didat 5KB m_00000000003586951895_3113203713.didat 5KB m_00000000001951949339_0828849418.didat 4KB m_00000000003312836325_0934858945.didat 4KB m_00000000002361773369_0156449476.didat 4KB m_00000000002722144201_3825996588.didat 3KB m_00000000002656529423_2179171295.didat 3KB libPortability.dll 881KB uart_tx_top.drc 200B uart_tx_top_ngc_zx.edif 162KB uart_tx_top_ngc_zx.edif 162KB
tb_receive_isim_beh.exe 123KB tb_Uart_Send_isim_beh.exe 122KB tb_Uart_Send_isim_beh.exe 93KB tb_receive_isim_beh.exe 93KB gen_test.gise 17KB UART.gise 8KB
usage_statistics_webtalk.html 48KB top_uart_envsettings.html 16KB uart_tx_top_envsettings.html 11KB uart_tx_top_summary.html 10KB gen_test_envsettings.html 8KB top_uart_summary.html 5KB gen_test_summary.html 4KB receive_summary.html 4KB isim_usage_statistics.html 2KB isim_usage_statistics.html 2KB xilinxsim.ini 16B xilinxsim.ini 16B planAhead.jou 1KB planAhead.jou 621B planAhead.log 6KB planAhead.log 5KB planAhead_run.log 5KB planAhead_run.log 4KB fuse.log 1KB fuse.log 1KB isim.log 886B planAhead.ngc2edif.log 830B webtalk.log 739B isimkernel.log 571B isimkernel.log 565B isim.log 380B isimcrash.log 0B isimcrash.log 0B top_uart.lso 6B uart_tx_top.lso 6B tb_Uart_Send.lso 6B gen_test.lso 6B netlist.lst 71B netlist.lst 41B uart_tx_top_map.map 3KB top_uart_map.map 2KB NEW.mcs 195KB UART_SEND.mcs 195KB uart_tx_top_map.mrp 6KB top_uart_map.mrp 5KB uart_tx_top_guide.ncd 31KB共 260 条
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观芯2020-12-11使用有问题或者有疑问的话，可以加我Q：2832475409，一起讨论
messics2019-05-16很好 观芯2020-12-11谢谢肯定- shine_lyg2018-01-02还没用就让我评论。。。 观芯2020-12-11确保功能是正常可以使用的，有问题可以加我Q：2832475409
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