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单片机温度控制系统外文翻译外文文献英文文献中英翻译.docx
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单片机温度控制系统外文翻译外文文献英文文献中英翻译.docx
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Design
of the
Temperature
Control System
Based
on
AT89C51
ABSTRACT
The principle and functions of the
temperature
control system based on
micro
controller
AT89C51
are studied, and the
temperature
measurement
unit consists of the
1-Wire bus digital
temperature
sensor DS18B20. The
system
can be
expected
to
detect the preset
temperature,
display time and save
monitoring
data. An
alarm
will
be
given by system if the
temperature
exceeds
the upper and
lower
limit value of the
temperature
which can be set discretionarily and then
automatic
control is
achieved,
thus the
temperature
is
achieved
monitoring
intelligently
within
a certain range.
Basing
on principle of the system, it is easy to make a variety of other non-linear
control
systems
so long as the
software
design
is
reasonably
changed.
The
system
has
been
proved
to be accurate,
reliable
and satisfied
through field
practice.
KEYWORDS:
AT89C51;
micro
controller;
DS18B20;
temperature
1
INTRODUCTION
Temperature
is a very
important
parameter
in human
life.
In the modern
society,
temperature
control (TC) is not only used in industrial production, but also
widely
used in other fields. With the
improvement
of the life quality, we can find the
TC
appliance
in hotels, factories and home as well. And the trend that TC will better
serve the whole society, so it is of great significance to
measure
and control the
temperature.
Based
on the AT89C51 and
temperature
sensor
DS18B20, this system
controls the
condition
temperature
intelligently. The
temperature
can be set
discretionarily within a certain range. The system can show the
time
on LCD, and
save
monitoring
data; and
automatically
control the
temperature
when the
condition
temperature
exceeds
the upper and
lower
limit
value. By doing so it is to keep the
temperature
unchanged. The system is of high
anti-jamming,
high control precision
and flexible design; it also fits the
rugged
environment.
It is
mainly
used in people's
life to
improve
the quality of the work and
life.
It is also versatile, so that it can be
convenient
to extend the use of the
system.
So the design is of profound
importance.
The
general
design,
hardware
design
and
software
design
of
the
system are
covered.
1.1
Introduction
![](https://csdnimg.cn/release/download_crawler_static/87871315/bg2.jpg)
The 8-bit
AT89C51
CHMOS microcontrollers are
designed
to handle
high-speed
calculations and fast input/output operations. MCS 51 microcontrollers are typically
1
![](https://csdnimg.cn/release/download_crawler_static/87871315/bg3.jpg)
used for
high-speed
event control
systems.
Commercial
applications include
modems,
motor-control
systems, printers, photocopiers,
air
conditioner control systems, disk
drives, and
medical
instruments. The
automotive
industry use MCS 51
microcontrollers in engine-control
systems,
airbags, suspension
systems,
and antilock
braking
systems
(ABS).
The AT89C51 is especially well suited to applications that
benefit from its
processing
speed and
enhanced
on-chip peripheral functions set, such
as
automotive
power-train
control, vehicle
dynamic
suspension,
antilock braking, and
stability control applications.
Because
of these
critical
applications, the
market
requires a reliable cost-effective controller with a low interrupt latency response,
ability to service the high
number
of time and event
driven
integrated peripherals
needed
in real
time
applications, and a CPU with above
average
processing power in a
single
package.
The financial and legal risk of having
devices
that operate
unpredictably
is very high. Once in the
market,
particularly in mission
critical
applications such as an autopilot or anti-lock braking
system,
mistakes
are financially
prohibitive.
Redesign
costs can run as high as a $500K, much more if the fix
means
2
back
annotating
it across a product
family
that share the
same
core and/or peripheral
design flaw. In addition, field
replacements
of
components
is
extremely
expensive,
as
the
devices
are typically sealed in
modules
with a
total
value several times that of the
component.
To mitigate these problems, it is essential that
comprehensive
testing of
the controllers be carried out at both the
component
level and system level under
worst case
environmental
and
voltage
conditions. This
complete
and thorough
validation necessitates not only a
well-defined
process
but also a proper
environment
and tools to
facilitate
and
execute
the
mission
successfully. Intel
Chandler
Platform
Engineering
group
provides
post silicon
system
validation (SV) of various
micro-
controllers and processors. The system validation process can be broken into three
major
parts. The type of the device and its application
requirements
determine
which
types
of
testing
are
performed
on the device.
1.2 The
AT89C51
provides the
following
standard
features
4Kbytes of Flash, 128
bytes
of RAM, 32 I/O lines, two 16-bittimer/counters, a
five vector
two-level
interrupt architecture, a full duple ser-ial port, on-chip oscillator
and
clock
circuitry. In addition, the
AT89C51
is
designed
with
static logic for
operation
down to zero
frequency
and supports two
software
selectable power saving
modes. The Idle Mode stops the CPU
while
allowing
the RAM, timer/counters, serial
port and interrupt sys -tem to
continue
functioning. The Power-down Mode
saves
the
![](https://csdnimg.cn/release/download_crawler_static/87871315/bg4.jpg)
2
![](https://csdnimg.cn/release/download_crawler_static/87871315/bg5.jpg)
RAM contents but freezes the oscil–lator disabling all other chip functions until the
next
hardware
reset.
1.3Pin
Description
VCC
Supply
voltage.
GND Ground.
Port 0:Port 0 is an 8-bit
open-drain
bi-directional I/O port. As an output port,
each pin can sink eight
TTL
inputs.
When
1s are written to port 0 pins, the pins
can
be
used as high
impedance
inputs. Port 0 may also be configured to be the
multiplexed
low order address/data bus during
accesses
to external
program
and data
memory.
In
this mode P0 has internal pull ups. Port 0 also receives the code bytes during
Flash
programming,
and
outputs
the code bytes during program verification.
External
pull
ups are
required
during
program
verification.
Port 1:Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The Port
1
output
buffers
can
sink/so -urce four TTL inputs. When 1s are written to Port 1 pins
they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port
1 pins that are externally being pulled low will source current (IIL)
because
of the
internal pullups. Port 1 also receives the low-order address bytes during Flash
programming
and verification.
Port 2:Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The Port
2 output buffers can sink/source four
TTL
inputs.
When
1s are written to Port 2 pins
they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port
2 pins that are externally being pulled low will source current (IIL)
because
of the
internal
pull
ups.
Port
2
emits
the
high-order
address
byte
during fetches from
external
program
memory
and during
accesses
to Port 2 pins that are externally being
pulled
low will
source
current (IIL)
because
of the internal pull ups. Port 2
emits
the high-
order address byte during fetches from external program
memory
and during
accesses
to external data
memory
that use 16-bit
addresses
(MOVX@DPTR). In this
application, it uses strong internal pull-ups when
emitting
1s. During
accesses
to
external data
memory
that use 8-bit
addresses
(MOVX @ RI), Port 2
emits
the
contents of the P2
Special
Function Register. Port 2 also receives the
high-order
address
bits
and some
control
signals durin
Flash
programming and verification.
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