24C08.pdf-eeprom-datasheet_可擦写存储器-EEPROMWC脚作用资源-CSDN文库

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### 24C08 EEPROM 数据手册解析 #### 概述本文档是对ST24C08 EEPROM数据手册的详细解析。该手册为英文版，涵盖了ST24C08与ST25C08这两款EEPROM（电可擦除可编程只读存储器）产品的技术细节。此外，手册还提供了关于ST24W08和ST25W08这两个硬件写保护版本的相关信息。这些芯片均具有8Kbit的容量，并支持用户自定义块写保护功能。 #### 主要特性 - **高耐用性**: 支持100万次擦写周期，确保数据保留长达40年。 - **单电源电压范围**: - 对于ST24x08系列，电压范围为3V至5.5V； - 对于ST25x08系列，电压范围为2.5V至5.5V。 - **硬件写控制版本**: 提供了ST24W08和ST25W08版本，具备硬件写保护机制。 - **兼容I²C总线**: 使用两线串行接口，完全兼容I²C总线标准。 - **写操作模式**: 支持字节写、多字节写（最多8字节）、页写（最多16字节）等操作。 - **读取模式**: 包括字节读、随机读和顺序读等多种模式。 - **自动地址递增**: 在进行连续写或读操作时，可以自动递增地址。 - **增强的ESD/闩锁性能**: 提高了静电放电和闩锁效应的抵抗能力。 #### 封装与引脚 - **封装形式**: 提供塑料双列直插式封装(PSDIP8)和小型封装(SO8)两种选项。 - **引脚定义**: - `E` (Chip Enable Input): 芯片使能输入，用于选择特定的EEPROM芯片。 - `SDA` (Serial Data Address Input/Output): 串行数据地址输入/输出引脚。 - `SCL` (Serial Clock): 串行时钟信号引脚。 - `MODE/WC*`: 多字节/页写模式（ST24x08）或写控制（ST25W08）。 - `VCC`: 电源电压输入。 - `VSS`: 接地端。 - `PRE`: 写保护启用（仅在硬件写控制版本中可用）。 #### 功能描述 ST24/25x08系列EEPROM产品由STMicroelectronics制造，采用了先进的CMOS技术。每款芯片均具有4个256x8位的数据块组织结构，共8K位的容量。这些EEPROM芯片具备以下特点： - **存储单元组织**: 组织为4个256x8位的数据块。 - **兼容I²C总线标准**: 采用双向数据总线和串行时钟，符合I²C标准。 - **设备识别码**: 内置一个4位的唯一设备识别码（1010），符合I²C总线定义。 - **芯片选择**: 通过一个芯片使能输入（E）进行芯片选择，允许最多两个8K位的设备连接到同一I²C总线上并单独选通。 - **从属设备行为**: 在I²C协议中作为从属设备，所有内存操作都由串行时钟同步。 - **启动条件**: 读写操作由总线主控器产生的启动条件初始化。 #### 总结 ST24C08和ST25C08是高性能的EEPROM解决方案，适用于需要高可靠性和长时间数据保存的应用场景。其强大的耐用性、灵活的读写操作以及与I²C总线的兼容性使得它们成为许多电子设计中的首选。无论是用于消费电子产品还是工业应用，这些芯片都能够提供稳定的数据存储功能，满足不同领域的应用需求。

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ST24C08, ST25C08

ST24W08, ST25W08

8 Kbit Serial I

C Bus EEPROM

with User-Defined Block Write Protection

February 1999 1/16

AI00860E

E SDA

ST24x08

ST25x08

MODE/WC*

SCL

PRE

Figure 1. Logic Diagram

1 MILLION ERASE/WRITE CYCLES with

40 YEARS DATA RETENTION

SINGLE SUPPLY VOLTAGE:

– 3V to 5.5V for ST24x08 versions

– 2.5V to 5.5V for ST25x08 versions

HARDWARE WRITE CONTROL VERSIONS:

ST24W08 and ST25W08

PROGRAMMABLE WRITE PROTECTION

TWO WIRE SERIAL INTERFACE, FULLY I

BUS COMPATIBLE

BYTE and MULTIBYTE WRITE (up to 8

BYTES)

PAGE WRITE (up to 16 BYTES)

BYTE, RANDOM and SEQUENTIAL READ

MODES

SELF TIMED PROGRAMMING CYCLE

AUTOMATIC ADDRESS INCREMENTING

ENHANCED ESD/LATCH UP

PERFORMANCES

DESCRIPTION

This specification covers a range of 8 Kbits I

C bus

EEPROM products, the ST24/25C08 and the

ST24/25W08. In the text, products are referred to

as ST24/25x08, where "x" is: "C" for Standard

version and "W" for Hardware Write Control ver-

sion.

PRE Write Protect Enable

E Chip Enable Input

SDA Serial Data Address Input/Output

SCL Serial Clock

MODE

Multibyte/Page Write Mode

(C version)

WC Write Control (W version)

Supply Voltage

Ground

Table 1. Signal Names

SO8 (M)

150mil Width

PSDIP8 (B)

0.25mm Frame

Note:

WC signal is only available for ST24/25W08 products.

The ST24/25x08 are 8 Kbit electrically erasable

programmable memories (EEPROM), organized

as 4 blocks of 256 x8 bits. They are manufactured

in STMicroelectronics’s Hi-Endurance Advanced

CMOS technology which guarantees an endur-

ance of one million erase/write cycles with a data

retention of 40 years.

Both Plastic Dual-in-Line and Plastic Small Outline

packages are available.

The memories are compatible with the I

C stand-

ard, two wire serial interface which uses a bi-direc-

tional data bus and serial clock. The memories

carry a built-in 4 bit, unique device identification

code (1010) corresponding to the I

C bus defini-

tion. This is used together with 1 chip enable input

(E) so that up to 2 x 8K devices may be attached

to the I

C bus and selected individually. The memo-

ries behave as a slave device in the I

C protocol

with all memory operations synchronized by the

serial clock. Read and write operations are initiated

by a START condition generated by the bus master.

The START condition is followed by a stream of 7

bits (identification code 1010), plus one read/write

bit and terminated by an acknowledge bit.

SDAV

SCL

MODE/WCNC

PRE V

AI00861E

ST24x08

ST25x08

Figure 2A. DIP Pin Connections

AI01073E

SDAV

SCL

MODE/WCNC

PRE V

ST24x08

ST25x08

Figure 2B. SO Pin Connections

DESCRIPTION (cont’d)

Symbol Parameter Value Unit

Ambient Operating Temperature –40 to 125

STG

Storage Temperature –65 to 150

LEAD

Lead Temperature, Soldering (SO8 package)

(PSDIP8 package)

40 sec

10 sec

215

260

Input or Output Voltages –0.6 to 6.5 V

Supply Voltage –0.3 to 6.5 V

ESD

Electrostatic Discharge Voltage (Human Body model)

(2)

4000 V

Electrostatic Discharge Voltage (Machine model)

(3)

500 V

Notes:

1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"

may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other

conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum

Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other

relevant quality documents.

2. MIL-STD-883C, 3015.7 (100pF, 1500

Ω

3. EIAJ IC-121 (Condition C) (200pF, 0

Ω

Table 2. Absolute Maximum Ratings

(1)

Warning:

NC = Not Connected.

Warning:

NC = Not Connected.

2/16

ST24/25C08, ST24/25W08

Mode RW bit MODE Bytes Initial Sequence

Current Address Read ’1’ X 1 START, Device Select, R

W = ’1’

Random Address Read

’0’

START, Device Select, R

W = ’0’, Address,

’1’ reSTART, Device Select, R

W = ’1’

Sequential Read ’1’ X 1 to 1024 Similar to Current or Random Mode

Byte Write ’0’ X 1 START, Device Select, R

W = ’0’

Multibyte Write

(2)

’0’ V

8 START, Device Select, RW = ’0’

Page Write ’0’ V

16 START, Device Select, RW = ’0’

Notes:

1. X = V

or V

2. Multibyte Write not available in ST24/25W08 versions.

Table 4. Operating Modes

(1)

Device Code

Chip

Enable

Block

Select

Bit b7 b6 b5 b4 b3 b2 b1 b0

Device Select 1 0 1 0 E A9 A8 R

Note:

The MSB b7 is sent first.

Table 3. Device Select Code

When writing data to the memory it responds to the

8 bits received by asserting an acknowledge bit

during the 9th bit time. When data is read by the

bus master, it acknowledges the receipt of the data

bytes in the same way. Data transfers are termi-

nated with a STOP condition.

Power On Reset: V

lock out write protect. In

order to prevent data corruption and inadvertent

write operations during power up, a Power On

Reset (POR) circuit is implemented. Until the V

voltage has reached the POR threshold value, the

internal reset is active, all operations are disabled

and the device will not respond to any command.

In the same way, when V

drops down from the

operating voltage to below the POR threshold

value, all operations are disabled and the device

will not respond to any command. A stable V

must be applied before applying any logic signal.

SIGNAL DESCRIPTIONS

Serial Clock (SCL). The SCL input pin is used to

synchronize all data in and out of the memory. A

resistor can be connected from the SCL line to V

to act as a pull up (see Figure 3).

Serial Data (SDA). The SDA pin is bi-directional

and is used to transfer data in or out of the memory.

It is an open drain output that may be wire-OR’ed

with other open drain or open collector signals on

the bus. A resistor must be connected from the SDA

bus line to V

to act as pull up (see Figure 3).

Chip Enable (E). This chip enable input is used to

set one least significant bit (b3) of the device select

byte code. This input may be driven dynamically or

tied to V

or V

to establish the device select

code.

Protect Enable (PRE). The PRE input pin, in ad-

dition to the status of the Block Address Pointer bit

(b2, location 3FFh as in Figure 7), sets the PRE

write protection active.

Mode (MODE). The MODE input is available on pin

7 (see also

WC feature) and may be driven dynami-

cally. It must be at V

or V

for the Byte Write

mode, V

for Multibyte Write mode or V

for Page

Write mode. When unconnected, the MODE input

is internally read as a V

(Multibyte Write mode).

Write Control (

WC). An hardware Write Control

(

WC) feature is offered only for ST24W08 and

ST25W08 versions on pin 7. This feature is usefull

to protect the contents of the memory from any

erroneous erase/write cycle. The Write Control sig-

nal is used to enable (

WC = V

) or disable (WC =

) the internal write protection. When uncon-

nected, the

WC input is internally read as V

and

the memory area is not write protected.

3/16

ST24/25C08, ST24/25W08

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