Burst READ With Auto Precharge ............................................................................................................... 116
Burst WRITE With Auto Precharge .............................................................................................................. 117
RAS Lock Function .................................................................................................................................... 121
Delay Time From WRITE-to-READ with Auto Precharge .............................................................................. 122
REFRESH Command ..................................................................................................................................... 123
Burst READ Operation Followed by Per Bank Refresh .................................................................................. 129
Refresh Requirement ..................................................................................................................................... 130
SELF REFRESH Operation .............................................................................................................................. 131
Self Refresh Entry and Exit ......................................................................................................................... 131
Power-Down Entry and Exit During Self Refresh ......................................................................................... 132
Command Input Timing After Power-Down Exit ......................................................................................... 133
Self Refresh Abort ...................................................................................................................................... 134
MRR, MRW, MPC Commands During
t
XSR,
t
RFC ........................................................................................ 134
Power-Down Mode ........................................................................................................................................ 137
Power-Down Entry and Exit ....................................................................................................................... 137
Input Clock Stop and Frequency Change ........................................................................................................ 147
Clock Frequency Change – CKE LOW ......................................................................................................... 147
Clock Stop – CKE LOW ............................................................................................................................... 147
Clock Frequency Change – CKE HIGH ........................................................................................................ 147
Clock Stop – CKE HIGH ............................................................................................................................. 148
MODE REGISTER READ Operation ................................................................................................................ 149
MRR After a READ and WRITE Command .................................................................................................. 150
MRR After Power-Down Exit ...................................................................................................................... 152
MODE REGISTER WRITE ............................................................................................................................... 153
Mode Register Write States ......................................................................................................................... 154
V
REF
Current Generator (VRCG) ..................................................................................................................... 155
V
REF
Training ................................................................................................................................................. 157
V
REF(CA)
Training ........................................................................................................................................ 157
V
REF(DQ)
Training ....................................................................................................................................... 162
Command Bus Training ................................................................................................................................. 167
Command Bus Training Mode .................................................................................................................... 167
Training Sequence for Single-Rank Systems ................................................................................................ 168
Training Sequence for Multiple-Rank Systems ............................................................................................ 169
Relation Between CA Input Pin and DQ Output Pin ..................................................................................... 170
Write Leveling ............................................................................................................................................... 174
Mode Register Write-WR Leveling Mode ..................................................................................................... 174
Write Leveling Procedure ........................................................................................................................... 174
Input Clock Frequency Stop and Change .................................................................................................... 175
MULTIPURPOSE Operation ........................................................................................................................... 178
Read DQ Calibration Training ........................................................................................................................ 183
Read DQ Calibration Training Procedure .................................................................................................... 183
Read DQ Calibration Training Example ...................................................................................................... 185
MPC[READ DQ CALIBRATION] After Power-Down Exit ............................................................................... 186
Write Training ............................................................................................................................................... 186
Internal Interval Timer .............................................................................................................................. 192
DQS Interval Oscillator Matching Error ...................................................................................................... 194
OSC Count Readout Time .......................................................................................................................... 195
Thermal Offset .............................................................................................................................................. 197
Temperature Sensor ...................................................................................................................................... 197
ZQ Calibration ............................................................................................................................................... 198
ZQCAL Reset ............................................................................................................................................. 199
Multichannel Considerations ..................................................................................................................... 200
Micron Confidential and Proprietary
200b: x16/x32 LPDDR4/LPDDR4X SDRAM
Features
CCM005-554574167-10522
200b_z11m_non-auto_lpddr4_lpddr4x.pdf – Rev. C 11/18 EN
4
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