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IEEE Standard for Ethernet

SECTION FOUR

This section includes Clause 44 through Clause 55 and Annex 44A through Annex 55B.

Contents

44. Introduction to 10 Gb/s baseband network ........................................................................................... 37

44.1 Overview..................................................................................................................................... 37

44.1.1 Scope................................................................................................................................... 37

44.1.2 Objectives ........................................................................................................................... 37

44.1.3 Relationship of 10 Gigabit Ethernet to the ISO OSI reference model................................ 37

44.1.4 Summary of 10 Gigabit Ethernet sublayers ........................................................................ 38

44.1.4.1 Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface

(XGMII).................................................................................................................... 38

44.1.4.2 XGMII Extender Sublayer (XGXS) and 10 Gigabit Attachment Unit Interface

(XAUI)...................................................................................................................... 39

44.1.4.3 Management interface (MDIO/MDC) ...................................................................... 39

44.1.4.4 Physical Layer signaling systems ............................................................................. 39

44.1.4.5 WAN Interface Sublayer (WIS), type 10GBASE-W ............................................... 40

44.1.5 Management........................................................................................................................ 40

44.2 State diagrams............................................................................................................................. 40

44.3 Delay constraints......................................................................................................................... 40

44.4 Protocol implementation conformance statement (PICS) proforma........................................... 42

45. Management Data Input/Output (MDIO) Interface.............................................................................. 43

45.1 Overview..................................................................................................................................... 43

45.1.1 Summary of major concepts ............................................................................................... 43

45.1.2 Application.......................................................................................................................... 43

45.2 MDIO Interface Registers........................................................................................................... 44

45.2.1 PMA/PMD registers ........................................................................................................... 47

45.2.1.1 PMA/PMD control 1 register (Register 1.0)............................................................. 51

45.2.1.1.1 Reset (1.0.15).................................................................................................. 52

45.2.1.1.2 Low power (1.0.11) ........................................................................................ 52

45.2.1.1.3 Speed selection (1.0.13,1.0.6, 1.0.5:2)............................................................ 53

45.2.1.1.4 PMA remote loopback (1.0.1) ........................................................................ 53

45.2.1.1.5 PMA local loopback (1.0.0)............................................................................ 53

45.2.1.2 PMA/PMD status 1 register (Register 1.1)............................................................... 54

45.2.1.2.1 Fault (1.1.7)..................................................................................................... 54

45.2.1.2.2 Receive link status (1.1.2)............................................................................... 54

45.2.1.2.3 Low-power ability (1.1.1)............................................................................... 55

45.2.1.3 PMA/PMD device identifier (Registers 1.2 and 1.3)................................................ 55

45.2.1.4 PMA/PMD speed ability (Register 1.4).................................................................... 55

45.2.1.4.1 100G capable (1.4.9)....................................................................................... 56

45.2.1.4.2 40G capable (1.4.8)......................................................................................... 56

45.2.1.4.3 10/1G capable (1.4.7)...................................................................................... 56

45.2.1.4.4 10M capable (1.4.6) ........................................................................................ 56

45.2.1.4.5 100M capable (1.4.5) ...................................................................................... 56

45.2.1.4.6 1000M capable (1.4.4) .................................................................................... 56

45.2.1.4.7 10PASS-TS capable (1.4.2) ............................................................................ 56

45.2.1.4.8 2BASE-TL capable (1.4.1) ............................................................................. 56

45.2.1.4.9 10G capable (1.4.0)......................................................................................... 57

45.2.1.5 PMA/PMD devices in package (Registers 1.5 and 1.6) ........................................... 57

45.2.1.6 PMA/PMD control 2 register (Register 1.7)............................................................. 57

45.2.1.6.1 PMA/PMD type selection (1.7.5:0) ................................................................ 57

45.2.1.7 PMA/PMD status 2 register (Register 1.8)............................................................... 57

45.2.1.7.1 Device present (1.8.15:14).............................................................................. 57

45.2.1.7.2 Transmit fault ability (1.8.13)......................................................................... 57

45.2.1.7.3 Receive fault ability (1.8.12) .......................................................................... 57

45.2.1.7.4 Transmit fault (1.8.11) .................................................................................... 57

45.2.1.7.5 Receive fault (1.8.10)...................................................................................... 59

45.2.1.7.6 PMA/PMD extended abilities (1.8.9) ............................................................. 61

45.2.1.7.7 PMD transmit disable ability (1.8.8) .............................................................. 61

45.2.1.7.8 10GBASE-SR ability (1.8.7) .......................................................................... 61

45.2.1.7.9 10GBASE-LR ability (1.8.6) .......................................................................... 61

45.2.1.7.10 10GBASE-ER ability (1.8.5) .......................................................................... 61

45.2.1.7.11 10GBASE-LX4 ability (1.8.4)........................................................................ 61

45.2.1.7.12 10GBASE-SW ability (1.8.3) ......................................................................... 62

45.2.1.7.13 10GBASE-LW ability (1.8.2)......................................................................... 62

45.2.1.7.14 10GBASE-EW ability (1.8.1)......................................................................... 62

45.2.1.7.15 PMA local loopback ability (1.8.0) ................................................................ 62

45.2.1.8 PMD transmit disable register (Register 1.9) ........................................................... 62

45.2.1.8.1 PMD transmit disable 9 (1.9.10)..................................................................... 62

45.2.1.8.2 PMD transmit disable 4, 5, 6, 7, 8 (1.9.5, 1.9.6, 1.9.7, 1.9.8, 1.9.9)............... 63

45.2.1.8.3 PMD transmit disable 3 (1.9.4)....................................................................... 63

45.2.1.8.4 PMD transmit disable 2 (1.9.3)....................................................................... 64

45.2.1.8.5 PMD transmit disable 1 (1.9.2)....................................................................... 64

45.2.1.8.6 PMD transmit disable 0 (1.9.1)....................................................................... 64

45.2.1.8.7 Global PMD transmit disable (1.9.0).............................................................. 64

45.2.1.9 PMD receive signal detect register (Register 1.10) .................................................. 64

45.2.1.9.1 PMD receive signal detect 9 (1.10.10) ........................................................... 65

45.2.1.9.2 PMD receive signal detect 4, 5, 6, 7, 8 (1.10.5, 1.10.6, 1.10.7, 1.10.8,

1.10.9) ............................................................................................................. 65

45.2.1.9.3 PMD receive signal detect 3 (1.10.4) ............................................................. 65

45.2.1.9.4 PMD receive signal detect 2 (1.10.3) ............................................................. 66

45.2.1.9.5 PMD receive signal detect 1 (1.10.2) ............................................................. 66

45.2.1.9.6 PMD receive signal detect 0 (1.10.1) ............................................................. 66

45.2.1.9.7 Global PMD receive signal detect (1.10.0)..................................................... 66

45.2.1.10 PMA/PMD extended ability register (Register 1.11) ............................................... 66

45.2.1.10.1 P2MP ability (1.11.9)...................................................................................... 67

45.2.1.10.2 10BASE-T ability (1.11.8).............................................................................. 67

45.2.1.10.3 100BASE-TX ability (1.11.7)......................................................................... 67

45.2.1.10.4 1000BASE-KX ability (1.11.6) ...................................................................... 67

45.2.1.10.5 1000BASE-T ability (1.11.5).......................................................................... 67

45.2.1.10.6 10GBASE-KR ability (1.11.4)........................................................................ 67

45.2.1.10.7 10GBASE-KX4 ability (1.11.3) ..................................................................... 68

45.2.1.10.8 10GBASE-T ability (1.11.2)........................................................................... 68

45.2.1.10.9 10GBASE-LRM ability (1.11.1) .................................................................... 68

45.2.1.10.10 10GBASE-CX4 ability (1.11.0)...................................................................... 68

45.2.1.11 10G-EPON PMA/PMD ability register (Register 1.12) ........................................... 68

45.2.1.11.1 10/1GBASE-PRX-D1 ability (1.12.10) .......................................................... 69

45.2.1.11.2 10/1GBASE-PRX-D2 ability (1.12.9) ............................................................ 69

45.2.1.11.3 10/1GBASE-PRX-D3 ability (1.12.8) ............................................................ 69

45.2.1.11.4 10GBASE-PR-D1 ability (1.12.7) .................................................................. 69

45.2.1.11.5 10GBASE-PR-D2 ability (1.12.6) .................................................................. 69

45.2.1.11.6 10GBASE-PR-D3 ability (1.12.5) .................................................................. 69

45.2.1.11.7 10/1GBASE-PRX-U1 ability (1.12.4) ............................................................ 70

45.2.1.11.8 10/1GBASE-PRX-U2 ability (1.12.3) ............................................................ 70

45.2.1.11.9 10/1GBASE-PRX-U3 ability (1.12.2) ............................................................ 70

45.2.1.11.10 10GBASE-PR-U1 ability (1.12.1) .................................................................. 70

45.2.1.11.

11 10GBASE-PR-U3 ability (1.12.0) .................................................................. 70

45.2.1.12 40G/100G PMA/PMD extended ability register (Register 1.13) ............................. 70

45.2.1.12.1 PMA remote loopback ability (1.13.15) ......................................................... 71

45.2.1.12.2 100GBASE-ER4 ability (1.13.11) .................................................................. 71

45.2.1.12.3 100GBASE-LR4 ability (1.13.10) .................................................................. 71

45.2.1.12.4 100GBASE-SR10 ability (1.13.9) .................................................................. 71

45.2.1.12.5 100GBASE-CR10 ability (1.13.8).................................................................. 71

45.2.1.12.6 40GBASE-FR ability (1.13.4) ........................................................................ 72

45.2.1.12.7 40GBASE-LR4 ability (1.13.3) ...................................................................... 72

45.2.1.12.8 40GBASE-SR4 ability (1.13.2) ...................................................................... 72

45.2.1.12.9 40GBASE-CR4 ability (1.13.1)...................................................................... 72

45.2.1.12.10 40GBASE-KR4 ability (1.13.0)...................................................................... 72

45.2.1.13 PMA/PMD package identifier (Registers 1.14 and 1.15)......................................... 72

45.2.1.14 10P/2B PMA/PMD control register (Register 1.30)................................................. 72

45.2.1.14.1 PMA/PMD link control (1.30.15)................................................................... 72

45.2.1.14.2 STFU (1.30.14) ............................................................................................... 73

45.2.1.14.3 Silence time (1.30.13:8).................................................................................. 73

45.2.1.14.4 Port subtype select (1.30.7)............................................................................. 73

45.2.1.14.5 Handshake cleardown (1.30.6) ....................................................................... 74

45.2.1.14.6 Ignore incoming handshake (1.30.5) .............................................................. 74

45.2.1.14.7 PMA/PMD type selection (1.30.4:0) .............................................................. 74

45.2.1.15 10P/2B PMA/PMD status register (Register 1.31)................................................... 74

45.2.1.15.1 Data rate (1.31.15:5) ....................................................................................... 75

45.2.1.15.2 CO supported (1.31.4) .................................................................................... 75

45.2.1.15.3 CPE supported (1.31.3)................................................................................... 75

45.2.1.15.4 PMA/PMD link status (1.31.2:0).................................................................... 75

45.2.1.16 Link partner PMA/PMD control register (Register 1.32)......................................... 75

45.2.1.16.1 Get link partner parameters (1.32.15)............................................................. 77

45.2.1.16.2 Send link partner parameters (1.32.13)........................................................... 77

45.2.1.17 Link partner PMA/PMD status register (Register 1.33)........................................... 77

45.2.1.17.1 Get link partner result (1.33.14)...................................................................... 78

45.2.1.17.2 Send link partner result (1.33.12) ................................................................... 78

45.2.1.18 10P/2B PMA/PMD link loss register (Register 1.36)............................................... 78

45.2.1.19 10P/2B RX SNR margin register (Register 1.37)..................................................... 78

45.2.1.20 10P/2B link partner RX SNR margin register (Register 1.38) ................................. 79

45.2.1.21 10P/2B line attenuation register (Register 1.39)....................................................... 79

45.2.1.22 10P/2B link partner line attenuation register (Register 1.40) ................................... 79

45.2.1.23 10P/2B line quality thresholds register (Register 1.41)............................................ 79

45.2.1.23.1 Loop attenuation threshold (1.41.15:8)........................................................... 80

45.2.1.23.2 SNR margin threshold (1.41.7:4).................................................................... 80

45.2.1.24 2B link partner line quality thresholds register (Register 1.42)................................ 80

45.2.1.25 10P FEC correctable errors counter (Register 1.43)................................................. 80

45.2.1.26 10P FEC uncorrectable errors counter (Register 1.44)............................................. 80

45.2.1.27 10P link partner FEC correctable errors register (Register 1.45) ............................. 81

45.2.1.28 10P link partner FEC uncorrectable errors register (Register 1.46) ......................... 81

45.2.1.29 10P electrical length register (Register 1.47)............................................................ 81

45.2.1.29.1 Electrical length (1.47.15:0) ........................................................................... 81

45.2.1.30 10P link partner electrical length register (Register 1.48) ........................................ 81

45.2.1.31 10P PMA/PMD general configuration register (Register 1.49) ............................... 82

45.2.1.31.1 TX window length (1.49.7:0) ......................................................................... 82

45.2.1.32 10P PSD configuration register (Register 1.50) ....................................................... 82

45.2.1.32.1 PBO disable (1.50.8)....................................................................................... 82

45.2.1.33 10P downstream data rate configuration (Registers 1.51, 1.52)............................... 82

45.2.1.34 10P downstream Reed-Solomon configuration (Register 1.53) ............................... 83

45.2.1.34.1 RS codeword length (1.53.0) .......................................................................... 83

45.2.1.35 10P upstream data rate configuration (Registers 1.54, 1.55).................................... 83

45.2.1.36 10P upstream 10P upstream Reed-Solomon configuration register (Register

1.56) .......................................................................................................................... 83

45.2.1.36.1 RS codeword length (1.56.0) .......................................................................... 84

45.2.1.37 10P tone group registers (Registers 1.57, 1.58)........................................................ 84

45.2.1.38 10P tone control parameters (Registers 1.59, 1.60, 1.61, 1.62, 1.63)....................... 85

45.2.1.38.1 Tone active (1.59.15) ...................................................................................... 85

45.2.1.38.2 Tone direction (1.59.14) ................................................................................. 85

45.2.1.38.3 Max SNR margin (1.59.13:5) ......................................................................... 86

45.2.1.38.4 Target SNR margin (1.60.8:0) ........................................................................ 86

45.2.1.38.5 Minimum SNR margin (1.61.8:0)................................................................... 86

45.2.1.38.6 PSD level (1.62.8:0)........................................................................................ 86

45.2.1.38.7 USPBO reference (1.63.8:0)........................................................................... 86

45.2.1.39 10P tone control action register (Register 1.64) ....................................................... 86

45.2.1.39.1 Refresh tone status (1.64.5) ............................................................................ 87

45.2.1.39.2 Change tone activity (1.64.4).......................................................................... 87

45.2.1.39.3 Change tone direction (1.64.3) ....................................................................... 87

45.2.1.39.4 Change SNR margin (1.64.2) ......................................................................... 87

45.2.1.39.5 Change PSD level (1.64.1) ............................................................................. 87

45.2.1.39.6 Change USPBO reference PSD (1.64.0) ........................................................ 88

45.2.1.40 10P tone status registers (Registers 1.65, 1.66, 1.67) ............................................... 88

45.2.1.40.1 Refresh status (1.65.15) .................................................................................. 88

45.2.1.40.2 Active (1.65.14) .............................................................................................. 88

45.2.1.40.3 Direction (1.65.13).......................................................................................... 89

45.2.1.40.4 RX PSD (1.65.7:0).......................................................................................... 89

45.2.1.40.5 TX PSD (1.66.15:8) ........................................................................................ 89

45.2.1.40.6 Bit load (1.66.7:3)........................................................................................... 89

45.2.1.40.7 SNR margin (1.67.9:0).................................................................................... 89

45.2.1.41 10P outgoing indicator bits status register (Register 1.68) ....................................... 89

45.2.1.41.1 LoM (1.68.8)................................................................................................... 90

45.2.1.41.2 lpr (1.68.7) ...................................................................................................... 90

45.2.1.41.3 po (1.68.6)....................................................................................................... 90

45.2.1.41.4 Rdi (1.68.5) ..................................................................................................... 90

45.2.1.41.5 los (1.68.4) ...................................................................................................... 90

45.2.1.41.6 fec-s (1.68.1) ................................................................................................... 90

45.2.1.41.7 be-s (1.68.0) .................................................................................................... 90

45.2.1.42 10P incoming indicator bits status register (Register 1.69) ...................................... 90

45.2.1.42.1 LoM (1.69.8)................................................................................................... 91

45.2.1.42.2 Flpr (1.69.7) .................................................................................................... 91

45.2.1.42.3 Fpo (1.69.6)..................................................................................................... 91

45.2.1.42.4 Rdi (1.69.5) ..................................................................................................... 91

45.2.1.42.5 Flos (1.69.4).................................................................................................... 92

45.2.1.42.6 Ffec-s (1.69.1)................................................................................................. 92

45.2.1.42.7 Febe-s (1.69.0) ................................................................................................ 92

45.2.1.43 10P cyclic extension configuration register (Register 1.70)..................................... 92

45.2.1.44 10P attainable downstream data rate register (Register 1.71) .................................. 92

45.2.1.45 2B general parameter register (Register 1.80) .......................................................... 93

45.2.1.45.1 PMMS target margin (1.80.14:10).................................................................. 93

45.2.1.45.2 Line probing control (1.80.9).......................................................................... 93

45.2.1.45.3 Noise environment (1.80.8) ............................................................................ 94

45.2.1.45.4 Region (1.80.1:0) ............................................................................................ 94

45.2.1.46 2B PMD parameters registers (Registers 1.81 through 1.88) ................................... 94

45.2.1.46.1 Minimum data rate (1.81, 1.83, 1.85, 1.87. Bits 14:8).................................... 96

45.2.1.46.2 Max data rate (1.81, 1.83, 1.85, 1.87. Bits 6:0) .............................................. 96

45.2.1.46.3 Data rate step (1.82, 1.84, 1.86, 1.88. Bits 13:7) ............................................ 97

45.2.1.46.4 Power (1.82, 1.84, 1.86, 1.88. Bits 6:2).......................................................... 97

45.2.1.46.5 Constellation (1.82, 1.84, 1.86, 1.88. Bits 1:0)............................................... 97

45.2.1.47 2B code violation errors counter (Register 1.89)...................................................... 97

45.2.1.48 2B link partner code violations register (Register 1.90)........................................... 97

45.2.1.49 2B errored seconds counter (Register 1.91).............................................................. 98

45.2.1.50 2B link partner errored seconds register (Register 1.92) .......................................... 98

45.2.1.51 2B severely errored seconds counter (Register 1.93) ............................................... 98

45.2.1.52 2B link partner severely errored seconds register (Register 1.94)............................ 98

45.2.1.53 2B LOSW counter (Register 1.95) ........................................................................... 99

45.2.1.54 2B link partner LOSW register (Register 1.96)........................................................ 99

45.2.1.55 2B unavailable seconds counter (Register 1.97)....................................................... 99

45.2.1.56 2B link partner unavailable seconds register (Register 1.98) ................................. 100

45.2.1.57 2B state defects register (Register 1.99) ................................................................. 100

45.2.1.57.1 Segment defect (1.99.15) .............................................................................. 100

45.2.1.57.2 SNR margin defect (1.99.14)........................................................................ 100

45.2.1.57.3 Loop attenuation defect (1.99.13)................................................................. 100

45.2.1.57.4 Loss of sync word (1.99.12) ......................................................................... 101

45.2.1.58 2B link partner state defects register (Register 1.100)............................................ 101

45.2.1.59 2B negotiated constellation register (Register 1.101)............................................. 101

45.2.1.59.1 Negotiated constellation (1.101.1:0)............................................................. 101

45.2.1.60 2B extended PMD parameters registers (Registers 1.102 through 1.109).............. 101

45.2.1.60.1 Minimum data rate (1.102, 1.104, 1.106, 1.108. Bits 14:8).......................... 103

45.2.1.60.2 Max data rate (1.102, 1.104, 1.106, 1.108. Bits 6:0) .................................... 103

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maclolo

2014-08-28

感谢楼主分享，google上都没找到。
lzr220

2014-11-22

还可以，要是有完整版就更好了
benlxt

2015-09-10

感谢楼主分享，我就剩三分了。。。我还想下载senction 4 ，没积分了啊，评论资源好久没给分了

tianheng-sf

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