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NVM Express

Management Interface

Specification

Revision 2.0

August 5th, 2024

Please send comments to info@nvmexpress.org

NVM Express

Management Interface Specification, Revision 2.0

The NVM Express

Management Interface Specification, Revision 2.0 available for download at

https://nvmexpress.org. The NVM Express Management Interface Specification, Revision 2.0 consists of

the NVM Express Management Interface Specification, Revision 1.2 ratified on June 2

, 2021, TP4029a,

TP4034a, TP4077, TP4094a, TP4119b, TP4135, TP4136, TP4145, TP4146b, TP4150, TP4156a, TP4159,

TP4169, TP4170, TP4182, TP6011a, TP6021, TP6027b, TP6032, TP6033a, TP6034a, TP6035a, TP6036,

TP6037, TP6038, TP8010a, TP8012, TP8016, TP8019a, TP8020, and the following ECNs: ECN001,

ECN103, ECN105, ECN109, ECN111, ECN113, ECN115, ECN116, ECN118, ECN119, ECN120, ECN122

(refer to https://nvmexpress.org/changes-in-nvme-mi-revision-2-0 for details).

SPECIFICATION DISLAIMER

LEGAL NOTICE:

This NVM Express

Management Interface Specification, Revision 2.0 is proprietary to the NVM Express,

Inc. (also referred to as “Company”) and/or its successors and assigns.

NOTICE TO USERS WHO ARE NVM EXPRESS, INC. MEMBERS: Members of NVM Express, Inc. have

the right to use and implement this NVM Express

Management Interface Specification, Revision 2.0

subject, however, to the Member’s continued compliance with the Company’s Intellectual Property Policy

and Bylaws and the Member’s Participation Agreement.

NOTICE TO NON-MEMBERS OF NVM EXPRESS, INC.: If you are not a Member of NVM Express, Inc.

and you have obtained a copy of this document, you only have a right to review this document or make

reference to or cite this document. Any such references or citations to this document must acknowledge

NVM Express, Inc. copyright ownership of this document. The proper copyright citation or reference is as

or references to this document you are not permitted to revise, alter, modify, make any derivatives of, or

otherwise amend the referenced portion of this document in any way without the prior express written

permission of NVM Express, Inc. Nothing contained in this document shall be deemed as granting you any

kind of license to implement or use this document or the specification described therein, or any of its

contents, either expressly or impliedly, or to any intellectual property owned or controlled by NVM Express,

Inc., including, without limitation, any trademarks of NVM Express, Inc.

LEGAL DISCLAIMER:

THIS DOCUMENT AND THE INFORMATION CONTAINED HEREIN IS PROVIDED ON AN “AS IS”

BASIS. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, NVM EXPRESS, INC. (ALONG

WITH THE CONTRIBUTORS TO THIS DOCUMENT) HEREBY DISCLAIM ALL REPRESENTATIONS,

WARRANTIES AND/OR COVENANTS, EITHER EXPRESS OR IMPLIED, STATUTORY OR AT

COMMON LAW, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF

MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, VALIDITY, AND/OR

NONINFRINGEMENT.

All product names, trademarks, registered trademarks, and/or servicemarks may be claimed as the property

of their respective owners.

The NVM Express

design mark is a registered trademark of NVM Express, Inc.

PCI-SIG

, PCI Express

, and PCIe

are registered trademarks of PCI-SIG.

NVM Express Workgroup

c/o VTM, Inc.

3855 SW 153

Drive

Beaverton, OR 97003 USA

info@nvmexpress.org

NVM Express
®
 Management Interface Specification, Revision 2.0   
 

 
Table of Contents 
TABLE OF CONTENTS ........................................................................................................... 3 
TABLE OF FIGURES .............................................................................................................. 6 
INTRODUCTION......................................................................................................... 10 
  Overview .......................................................................................................................................... 10 
  Scope ............................................................................................................................................... 10 
2.1  Outside of Scope ....................................................................................................................... 11 
  Theory of Operation ......................................................................................................................... 12 
3.1  Out-of-Band Theory of Operation .............................................................................................. 12 
3.2  In-Band Theory of Operation ..................................................................................................... 13 
  NVM Subsystem Architectural Model .............................................................................................. 13 
  NVMe Storage Device Architectural Model ..................................................................................... 15 
  NVMe Enclosure Architectural Model .............................................................................................. 17 
  Conventions ..................................................................................................................................... 22 
  Definitions ........................................................................................................................................ 23 
8.1  2-Wire ........................................................................................................................................ 23 
8.2  2-Wire Mux ................................................................................................................................ 24 
8.3  2-Wire Reset ............................................................................................................................. 24 
8.4  AE (Asynchronous Event) ......................................................................................................... 24 
8.5  AE Arm ...................................................................................................................................... 24 
8.6  AE Armed State ........................................................................................................................ 24 
8.7  AE Disarmed State .................................................................................................................... 24 
8.8  AE Sync .................................................................................................................................... 24 
8.9  AEM (Asynchronous Event Message) ....................................................................................... 24 
8.10  AEM Ack ................................................................................................................................... 25 
8.11  AEM Delay Interval.................................................................................................................... 25 
8.12  AEM Transmission Interval ....................................................................................................... 25 
8.13  Carrier ....................................................................................................................................... 25 
8.14  Command Message .................................................................................................................. 25 
8.15  Command Slot .......................................................................................................................... 25 
8.16  Control Primitive ........................................................................................................................ 25 
8.17  NVMe Controller (Controller) ..................................................................................................... 25 
8.18  NVMe Controller Management Interface (Controller Management Interface) ........................... 25 
8.19  Enclosure Management ............................................................................................................ 25 
8.20  Enclosure Services Process ...................................................................................................... 25 
8.21  Expansion Connector ................................................................................................................ 26 
8.22  Field-Replaceable Unit (FRU) ................................................................................................... 26 
8.23  FRU Information Device ............................................................................................................ 26 
8.24  Interpacket Time ....................................................................................................................... 26 
8.25  In-Band ...................................................................................................................................... 26 
8.26  Management Controller ............................................................................................................. 26 
8.27  Management Endpoint .............................................................................................................. 26 
8.28  Management Endpoint Buffer .................................................................................................... 26 
8.29  Management Endpoint Reset .................................................................................................... 26 
8.30  NVMe Enclosure ....................................................................................................................... 27 
8.31  NVMe Processing...................................................................................................................... 27 
8.32  NVMe Storage Device ............................................................................................................... 27 
8.33  NVMe Storage Device FRU ...................................................................................................... 27 
8.34  NVMe Subenclosure (Subenclosure) ........................................................................................ 27 
8.35  NVMe-MI Message.................................................................................................................... 27 
8.36  NVM Subsystem ....................................................................................................................... 27 
8.37  Out-of-Band ............................................................................................................................... 27 
8.38  PCIe Reset ................................................................................................................................ 28 
8.39  Process ..................................................................................................................................... 28 
8.40  Request Message ..................................................................................................................... 28 
8.41  Request-To-Response Time ..................................................................................................... 28 
8.42  Requester .................................................................................................................................. 28 

NVM Express
®
 Management Interface Specification, Revision 2.0 
 

 
8.43  Responder ................................................................................................................................. 28 
8.44  Response Message................................................................................................................... 28 
8.45  Transmission Delay ................................................................................................................... 28 
8.46  Upstream Connector ................................................................................................................. 28 
8.47  Vendor ID .................................................................................................................................. 29 
8.48  VPD or Vital Product Data ......................................................................................................... 29 
  Keywords ......................................................................................................................................... 29 
9.1  mandatory ................................................................................................................................. 29 
9.2  may ........................................................................................................................................... 29 
9.3  obsolete ..................................................................................................................................... 29 
9.4  optional ...................................................................................................................................... 29 
9.5  R................................................................................................................................................ 29 
9.6  reserved .................................................................................................................................... 29 
9.7  shall ........................................................................................................................................... 29 
9.8  should ........................................................................................................................................ 29 
 Byte, Word, and Dword Relationships ............................................................................................. 30 
 References ...................................................................................................................................... 30 
PHYSICAL LAYER ...................................................................................................... 32 
  PCI Express ..................................................................................................................................... 32 
  2-Wire .............................................................................................................................................. 32 
MESSAGE TRANSPORT .............................................................................................. 37 
  NVMe-MI Messages ........................................................................................................................ 37 
1.1  Message Fields ......................................................................................................................... 37 
  Out-of-Band Message Transport ..................................................................................................... 42 
2.1  MCTP Packet ............................................................................................................................ 43 
2.2  Out-of-Band Error Handling ....................................................................................................... 46 
  In-Band Tunneling Message Transport ........................................................................................... 46 
MESSAGE SERVICING MODEL ..................................................................................... 47 
  NVMe-MI Messages ........................................................................................................................ 47 
1.1  Request Messages.................................................................................................................... 48 
1.2  Response Messages ................................................................................................................. 48 
1.3  Asynchronous Event Messages (AEMs) (Optional)................................................................... 53 
  Out-of-Band Request Message Servicing Model ............................................................................ 53 
2.1  Control Primitives ...................................................................................................................... 55 
2.2  Out-of-Band Error Handling ....................................................................................................... 63 
2.3  Management Endpoint Buffer .................................................................................................... 64 
  In-Band Tunneling Request Message Servicing Model .................................................................. 65 
3.1  NVMe-MI Send Command ........................................................................................................ 66 
3.2  NVMe-MI Receive Command .................................................................................................... 72 
  Out-of-Band AEM Servicing Model .................................................................................................. 78 
4.1  Management Endpoint AE Armed State and AE Disarmed State ............................................. 78 
4.2  AEM Delay Interval.................................................................................................................... 78 
4.3  AEM Transmission Interval ....................................................................................................... 78 
4.4  AEM Format .............................................................................................................................. 79 
4.5  AE Identifier Information ............................................................................................................ 83 
4.6  AE Occurrence Specific Information.......................................................................................... 86 
MANAGEMENT INTERFACE COMMAND SET .................................................................... 89 
  Configuration Get ............................................................................................................................. 92 
1.1  SMBus/I2C Frequency (Configuration Identifier 01h) ................................................................ 93 
1.2  Health Status Change (Configuration Identifier 02h) ................................................................. 94 
1.3  MCTP Transmission Unit Size (Configuration Identifier 03h) .................................................... 94 
1.4  Asynchronous Event (Configuration Identifier 04h) ................................................................... 94 
  Configuration Set ............................................................................................................................. 96 
2.1  SMBus/I2C Frequency (Configuration Identifier 01h) ................................................................ 96 
2.2  Health Status Change (Configuration Identifier 02h) ................................................................. 97 
2.3  MCTP Transmission Unit Size (Configuration Identifier 03h) .................................................... 98 
2.4  Asynchronous Event (Configuration Identifier 04h) ................................................................... 99 

NVM Express
®
 Management Interface Specification, Revision 2.0   
 
5 
 
  Controller Health Status Poll ......................................................................................................... 103 
5.3.1  Controller Selection Criteria .................................................................................................... 112 
  Management Endpoint Buffer Read .............................................................................................. 113 
  Management Endpoint Buffer Write .............................................................................................. 114 
  NVM Subsystem Health Status Poll .............................................................................................. 115 
  Read NVMe-MI Data Structure ...................................................................................................... 120 
5.7.1  NVM Subsystem Information Response Data ......................................................................... 121 
5.7.2  Port Information Response Data ............................................................................................. 122 
5.7.3  Controller List Response Data ................................................................................................ 126 
5.7.4  Controller Information Response Data .................................................................................... 126 
5.7.5  Optionally Supported Command List Response Data ............................................................. 127 
5.7.6  Management Endpoint Buffer Command Support List Response Data .................................. 128 
  Reset ............................................................................................................................................. 129 
  SES Receive .................................................................................................................................. 129 
 SES Send ...................................................................................................................................... 130 
 Shutdown ....................................................................................................................................... 131 
 VPD Read ...................................................................................................................................... 132 
 VPD Write ...................................................................................................................................... 133 
6  NVM EXPRESS ADMIN COMMAND SET ....................................................................... 135 
  Request and Response Data ........................................................................................................ 140 
  Status ............................................................................................................................................. 142 
  Get Log Page ................................................................................................................................. 143 
  Sanitize Operation and Format NVM Command ........................................................................... 144 
  Set Features and Get Features ..................................................................................................... 145 
7  PCIE COMMAND SET (OPTIONAL) ............................................................................. 148 
  PCIe Configuration Read ............................................................................................................... 150 
  PCIe Configuration Write ............................................................................................................... 151 
  PCIe I/O Read ............................................................................................................................... 152 
  PCIe I/O Write ................................................................................................................................ 152 
  PCIe Memory Read ....................................................................................................................... 153 
  PCIe Memory Write ....................................................................................................................... 154 
8  MANAGEMENT ARCHITECTURE ................................................................................. 156 
  Out-of-Band Operational Times ..................................................................................................... 156 
8.1.1  Controller Disable and Reset Interactions ............................................................................... 159 
8.1.2  Power Loss Signaling Interactions .......................................................................................... 160 
  Vital Product Data .......................................................................................................................... 161 
8.2.1  Common Header ..................................................................................................................... 162 
8.2.2  Product Info Area (offset 8 bytes) ............................................................................................ 163 
8.2.3  NVMe MultiRecord Area .......................................................................................................... 164 
8.2.4  NVMe PCIe Port MultiRecord Area ......................................................................................... 166 
8.2.5  Topology MultiRecord Area ..................................................................................................... 168 
  Reset Architecture ......................................................................................................................... 187 
8.3.1  NVM Subsystem Reset ........................................................................................................... 187 
8.3.2  Controller Level Reset ............................................................................................................. 187 
8.3.3  Management Endpoint Reset .................................................................................................. 188 
8.3.4  2-Wire Resets ......................................................................................................................... 188 
8.3.5  PCIe Reset .............................................................................................................................. 189 
  Security .......................................................................................................................................... 190 
  Shutdown Impacts ......................................................................................................................... 190 
APPENDIX A  TECHNICAL NOTE: NVM EXPRESS BASIC MANAGEMENT COMMAND ........... 193 
APPENDIX B  EXAMPLE MCTP MESSAGES & MESSAGE INTEGRITY CHECK ..................... 198 
APPENDIX C  EXAMPLE NVME-MI MESSAGES ............................................................ 200 
APPENDIX D  AEM EXAMPLE TIMING DIAGRAMS ........................................................ 205 