【最新版可复制文字】JEDECSPD4_01_06R26-01DefinitionsoftheEE1004-资源-CSDN文库

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【最新版可复制文字】 JEDEC SPD4_01_06R26-01 Definitions of the EE1004-v 4 Kbit Serial Presence Detect (SPD) EEPROM and TSE2004av 4 Kbit SPD EEPROM with Temperature Sensor (TS) for Memory Module Applications.pdf JEDEC（Joint Electron Device Engineering Council）是电子设备工程联合委员会的缩写，它是一个制定半导体行业标准的组织。JESD（JEDEC Standard）是JEDEC发布的一系列标准中的一个，用于规范各种电子器件的设计、制造和应用。在这个文档中，我们主要关注的是JESD21-C，它定义了4 Kbit Serial Presence Detect (SPD) EEPROM（EE1004-v）和带有温度传感器的4 Kbit SPD EEPROM（TSE2004av）在内存模块应用中的接口参数、信号协议和特性。 1. 标准范围这个标准旨在为内存模块应用中的SPD EEPROM和带有温度传感器的SPD EEPROM提供统一的规范。EE1004-v和TSE2004av是根据此标准定义的设备家族。目标是确保设备的兼容性、多源性、消除混淆，并简化设备规格说明和使用。标准的编写同时考虑了这两类设备，以便在需要EE和TS功能或仅需要EE功能的应用中促进设备的互换性。 2. 设备标准 EE1004-v是一个512字节的EEPROM，而TSE2004av是一个结合了512字节EEPROM和温度传感器的设备。两者都设计为工作在1.7-3.6 V或2.2-3.6 V的电压范围内。对于2.2-3.6 V的设备，它们的I2C总线操作速度最高可达1 MHz（Fast Mode+），并兼容SMBus 2.0规定的100 kHz操作。这些EE/TSE设备设计用于与共享总线上的多个设备交互，并且必须在总线上具有唯一的地址。 3. I2C总线接口 I2C（Inter-Integrated Circuit）是一种多主控通信协议，允许多个设备在一个两线制总线上通信。在EE/TSE设备上，它们必须能够与其他设备共享总线，并通过各自的地址识别进行通信。这确保了系统中可以有多个SPD设备同时存在而不引起冲突。 4. 温度传感器 TSE2004av集成的温度传感器功能使得内存模块能够监控其运行环境的温度，这对于保持稳定性和防止过热至关重要。内存性能和寿命往往受到温度的影响，因此这种内置的温度监测能力是现代内存模块设计中的一个重要组成部分。 5. 术语更新标准中还提到了将旧有的"master"和"slave"术语替换为"controller"和"target"，以符合现代对称性和敏感性的要求。这反映了技术社区对于语言使用的不断演进。 JEDEC SPD4_01_06R26-01标准详细描述了用于内存模块的4 Kbit SPD EEPROM和带有温度传感器的SPD EEPROM的规格，涵盖了设备的电气特性、通信协议、以及它们如何在多设备环境中协作。这些标准确保了设备之间的互操作性和系统的可靠性，是内存模块制造商和系统设计者的重要参考。

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JEDEC Standard No. 21-C

Page 4.1.6 – 1

4.1.6 Definitions of the EE1004-v 4 Kbit Serial Presence Detect (SPD) EEPROM and

TSE2004av 4 Kbit SPD EEPROM with Temperature Sensor (TS) for Memory

Module Applications

1. S

COPE

This standard defines the specifications of interface parameters, signaling protocols, and features for Serial

Presence Detect (SPD) EEPROM (EE) and Temperature Sensor (TS) as used for memory module

applications. The designations EE1004-v and TSE2004av refer to the families of devices specified by this

standard

The purpose is to provide a standard for the EE1004-v and TSE2004av devices for uniformity, multiplicity of

sources, elimination of confusion, ease of device specification, and ease of use.

A single specification document for both families of devices is written to establish and maintain the

commonality of these devices and promote the interchangeability of devices in target applications that may

require the EE and TS for some uses and EE only for other uses. When a portion of this specification refers to

both classes of devices, the abbreviation EE/TSE is used.

NOTES:

The designations EE1004-v and TSE2004av refer to the part of the part designation of a series of commercial

logic parts common in the industry. This number is normally preceded by a series of manufacturer specific

characters to make up a complete part designation.

Legacy terminology “master” and “slave” are replaced with “controller” and “target”, respectively.

2. DEVICE STANDARD

2.1. Description

The EE1004-v is a 512-byte EEPROM device. The TSE2004av is a combination 512-byte EEPROM and

Temperature Sensor device. The EE/TSE devices are designed to operate in one of two voltage ranges,

1.7-3.6 V or 2.2-3.6 V. All EE/TSE 2.2-3.6 V nominal devices shall operate the I

C Bus up to 1 MHz

maximum (Fast Mode+). Operation to 100 KHz compliant with SMBus 2.0 operation. EE/TSE devices are

intended to interface to I

C Buses which have multiple devices on a shared bus, and must be uniquely

addressed on this bus. A substantial reduction in supply current may be achieved using the software

programmed shutdown mode.

Release 26

Downloaded by 65 56 (cdm_lj@163.com) on Oct 25, 2022, 5:21 pm PDT

JEDEC

Release 26

JEDEC Standard No. 21-C

Page 4.1.6 – 2

2.2. Common Features Summary:

• Low operating current:

< 100 uA maximum with EE in Standby and TS in Shutdown mode

~1 mA typical with EE in Standby mode and TS active

~2 mA typical with TS and EE enabled at 3.3 V input

• Two Wire I

C Bus Serial Interface

• Up to 100 kHz Transfer Rate below 2.2 V compliant with SMBus 2.0

• Up to 1 MHz Transfer Rate (Fast Mode+ I

C Bus compliant) at or above 2.2 V

• Package: Thermally Enhanced PSON-8 standard for all JEDEC module applications

EE Features summary(EE/TSE):

• Individual Reversible Software Data Protection for all four 128 Byte Blocks

• Byte and Page (up to 16 Bytes) Write Operation

• Random and Sequential Read modes

• Self-Timed Write Cycle

• Automatic Address Incrementing

TS Features summary (TSE2004av only):

• Typical accuracy of 0.5 °C accuracy for the active range from 75 ~ 95 °C

• Typical accuracy of 1.0 °C for other monitor ranges from 40 ~ 125 °C

• Ambient temperature (TA) sense through an operating range of -20 to +125 °C

• Temperature sample rate minimum of 8 samples/s

• Selectable 0, 1.5 °C, 3 °C, 6 °C Hysteresis on set point

The EE/TSE devices include a 4 Kbit serial EEPROM organized as two pages of 256 bytes each, or 512 bytes

of total memory. Each page is comprised of two 128 byte blocks. The devices are able to selectively lock the

data in any or all of the four 128-byte blocks. Designed specifically for use in DRAM DIMMs (Dual Inline

Memory Modules) with Serial Presence Detect, all the information concerning the DRAM module

configuration (such as its access speed, its size, its organization) can be kept write protected in one or more of

the blocks of memory.

EE1004-v Variations

Base part number v Single Supply Voltage

EE1004

1.7 to 3.6 V

2.2 to 3.6 V

TSE2004av Variations

Base part number a Sensor Accuracy v Single Supply Voltage

TSE2004 B

0.5

°C typ from 75-95 °C

1.7 to 3.6 V

1.0 °C typ from 40-125 °C

2.2 to 3.6 V

2.0 °C typ from -20-125 °C

Examples:

1. EE1004-1 is a 512-byte SPD with a single supply voltage range from 1.7 to 3.6 V.

2. TSE2004B2 is a 512-byte SPD with Thermal Sensor having 0.5

ºC typical accuracy from 75-95 ºC and a single supply

voltage range from 2.2 to 3.6 V.

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JEDEC

Release 26

JEDEC Standard No. 21-C

Page 4.1.6 – 3

2.2. Common Features Summary (cont’d)

The EE/TSE devices are protocol compatible with previous generation 2 Kbit devices such as the EE1002(A)

and TSE2002av. The page selection method allows commands used with legacy devices such as EE1002(A)

and TSE2002av to be applied to the lower or upper pages of the EE/TSE. In this way, the EE/TSE may be used

in legacy applications without software changes. Minor exceptions to this compatibility, such as elimination of

the Permanent Write Protect feature, are documented.

Individually locking a 128-byte block of the EE may be accomplished using a software write protection

mechanism in conjunction with a high input voltage V

on input SA0. By sending the device a specific I

Bus sequence, each block may be protected from writes until write protection is electrically reversed using a

separate I

C Bus sequence which also requires V

on input SA0. Write protection for all four blocks is

cleared simultaneously, and write protection may be re-asserted after being cleared.

The Thermal Sensor (TS) section of the TSE2004av continuously monitors the temperature and updates the

temperature data a minimum of eight times per second. Temperature data is latched internally by the device and

may be read by software from the bus host at any time.

Internal registers are used to configure both the TS performance and response to over-temperature conditions.

The device contains programmable high, low, and critical temperature limits. Finally, the device EVENT_n pin

can be configured as active high or active low and can be configured to operate as an interrupt or as a

comparator output.

Figure 1 — Device Diagrams

2.3. Device Interface

The EE/TSE behaves as a target device in the I

C Bus protocol, with all operations synchronized by the serial

clock. Read and Write operations are initiated by a START condition, generated by the bus controller. The

START condition is followed by a Device Select Code and R/W_n bit (as described in Table 3 on page 8),

terminated by an acknowledge bit. EE/TSE family devices shall not initiate clock stretching, which is an

optional I

C Bus feature.

In accordance with the I

C Bus definition, the EE/TSE devices use three (3) built-in, 4-bit Device Type

Identifier Codes (DTIC) and a 3-bit Select Address to generate an I

C Bus Target Address. The EE memory

may be accessed using a DTIC of (1010), and to perform the SWPn, RSPn, or CSWP operations, a DTIC of

(0110) is required. The TS registers of the TSE2004av are accessed using a DTIC of (0011).

EE and TS portions of TSE devices are designed to operate in parallel. Accesses to each portion of the device

may be interleaved as long as the command protocol is followed.

SDA

SA0

SA1

SA2

SCL

NO CONNECT

DDSPD

SSSPD

SPD

SDA

SA0

SA1

SA2

SCL

EVENT_n

DDSPD

SSSPD

SPD

EE1004-v Device Diagram TSE2004av Device Diagram

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JEDEC

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