5
5
4
4
3
3
2
2
1
1
D
D
C
C
B B
A
A
EDP_RCOMP
1. Trace width=20 mils, Spacing=25mil, Max length=100mils
2. RC1 close to MCP
Trace Width=20mil, Spacing=25mil, Max length=100mil
DDPB_CTRLDATA
DDPC_CTRLDATA
Enable Disable
pull-high
pull-high
no connect
no connect
DP port
USB TYPE C
HDMI HDMI
USB TYPE C
HDMI
CPU_DDI2_P2<42>
CPU_DDI2_N2<42>
CPU_DDI2_P3<42>
CPU_DDI2_N3<42>
CPU_DDI2_P1<42>
CPU_DDI2_N0<42>
CPU_DDI2_P0<42>
CPU_DDI2_N1<42>
CPU_EDP_TX0+ <60>
CPU_EDP_TX0- <60>
CPU_EDP_TX1+ <60>
CPU_EDP_TX1- <60>
CPU_EDP_AUX <60>
CPU_EDP_AUX# <60>
DDIP1_CTRLCLK<47>
DDIP1_CTRLDATA<47>
DDIP2_AUXN <42>
DDIP2_AUXP <42>
DDIP1_HPD <47>
DDIP2_HPD <42>
CPU_EDP_HPD <60>
PCH_EDP_PWM <60>
ENBKL <40>
PCH_ENVDD <60>
+3VS <6,9,10,11,12,14,15,23,25,30,32,37,39,40,47,50,51,57,58,59,60,61,63,65,66,67,69,72,85,86>
CPU_DDI1_P1<47>
CPU_DDI1_P3<47>
CPU_DDI1_N0<47>
CPU_DDI1_P0<47>
CPU_DDI1_N1<47>
CPU_DDI1_N2<47>
CPU_DDI1_P2<47>
CPU_DDI1_N3<47>
+VCC_IO <11,18,21,71>
+VCC_IO
+3VS
+3VS
+VCC_IO
Size Document Number Rev
Date: Sheet
of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
0.2
KBL(A)_DDI/eDP
Custom
5 99
Monday, October 30, 2017
2015/01/12
2016/01/12
Size Document Number Rev
Date: Sheet
of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
0.2
KBL(A)_DDI/eDP
Custom
5 99
Monday, October 30, 2017
2015/01/12
2016/01/12
Size Document Number Rev
Date: Sheet
of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
0.2
KBL(A)_DDI/eDP
Custom
5 99
Monday, October 30, 2017
2015/01/12
2016/01/12
R0508 100K_0402_5%
1
2
R0503 2K_0402_5%
1 2
R0506 100K_0402_5%
@
1
2
R0505 2.2K_0402_5%
1
2
SKL_ULT
EDP
DISPLAY SIDEBANDS
DDI
1 OF 20REV = 1
UC1A
SKYLAKE-U_BGA1356
DDI1_AUXN
G50
DDI1_AUXP
F50
DDI1_TXN[0]
E55
DDI1_TXN[1]
E58
DDI1_TXN[2]
F53
DDI1_TXN[3]
F56
DDI1_TXP[0]
F55
DDI1_TXP[1]
F58
DDI1_TXP[2]
G53
DDI1_TXP[3]
G56
DDI2_AUXN
E48
DDI2_AUXP
F48
DDI2_TXN[0]
C50
DDI2_TXN[1]
C52
DDI2_TXN[2]
A50
DDI2_TXN[3]
D51
DDI2_TXP[0]
D50
DDI2_TXP[1]
D52
DDI2_TXP[2]
B50
DDI2_TXP[3]
C51
DDI3_AUXN
G46
DDI3_AUXP
F46
EDP_RCOMP
E52
EDP_AUXN
E45
EDP_AUXP
F45
EDP_DISP_UTIL
B52
EDP_TXN[0]
C47
EDP_TXN[1]
D46
EDP_TXN[2]
A45
EDP_TXN[3]
A47
EDP_TXP[0]
C46
EDP_TXP[1]
C45
EDP_TXP[2]
B45
EDP_TXP[3]
B47
GPP_E13/DDPB_HPD0
L9
GPP_E14/DDPC_HPD1
L7
GPP_E15/DDPD_HPD2
L6
GPP_E16/DDPE_HPD3
N9
GPP_E17/EDP_HPD
L10
GPP_E18/DDPB_CTRLCLK
L13
GPP_E19/DDPB_CTRLDATA
L12
GPP_E20/DDPC_CTRLCLK
N7
GPP_E21/DDPC_CTRLDATA
N8
GPP_E22/DDPD_CTRLCLK
N11
GPP_E23/DDPD_CTRLDATA
N12
EDP_BKLTCTL
R11
EDP_BKLTEN
R12
EDP_VDDEN
U13
R0507 100K_0201_1%
1
2
R0504 2.2K_0201_1%@
1
2
R0501
24.9_0402_1%
1
2
R0509 100K_0201_1%
1 2
R0502 2K_0402_5%
1
2
CPU_DDI2_N0
CPU_DDI2_P0
CPU_DDI2_P1
CPU_DDI2_N1
CPU_DDI2_P2
CPU_DDI2_N2
CPU_DDI2_N3
CPU_DDI2_P3
CPU_EDP_TX1-
CPU_EDP_TX1+
CPU_EDP_TX0-
CPU_EDP_TX0+
CPU_EDP_AUX#
CPU_EDP_AUX
EDP_COMP
DDIP1_CTRLCLK
DDIP1_CTRLDATA
DDIP2_CTRLCLK
DDIP2_CTRLDATA
DDIP2_AUXN
DDIP2_AUXP
DDIP1_HPD
DDIP2_HPD
CPU_EDP_HPD
PCH_EDP_PWM
ENBKL
PCH_ENVDD
DDIP2_CTRLCLK
DDIP2_CTRLDATA
DDIP1_CTRLDATA
DDIP1_CTRLCLK
CPU_DDI1_P0
CPU_DDI1_P2
CPU_DDI1_N3
CPU_DDI1_N1
CPU_DDI1_P1
CPU_DDI1_N0
CPU_DDI1_P3
CPU_DDI1_N2
ENBKL
CPU_EDP_HPD
DDIP1_HPD
DDIP2_HPD
