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AS3911读卡器芯片上含有电容式传感器,只需要5μA电流,就能在感知到标签的存在时唤醒。这种独特的功能使该芯片享有业界最低电流消耗。该IC还提供了自动天线调谐而非手动调谐,同时提供1W的输出功率,消除对外部升压电路的需求。这对需要650mW功率的信用卡/借记卡读取设备显得尤为重要。对比同类解决方案,它们需要复杂的外部升压电路。AS3911的高集成度和专用天线管理意味着典型系统所需成本将得以减半。
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ams Datasheet, Confidential: 2013-Oct [2-03] AS3911 – 1
AS3911
NFC Initiator / HF Reader IC
The AS3911 is a highly integrated NFC Initiator / HF Reader IC.
It includes the analog front end (AFE) and a highly integrated
data framing system for ISO 18092 (NFCIP-1) initiator, ISO 18092
(NFCIP-1) active target, ISO 14443 A and B reader (including
high bit rates) and FeliCa™ reader. Implementation of other
standard and custom protocols is possible through using the
AFE and implementing framing in the external microcontroller
(Stream and Transparent modes).
Compared with concurrent NFC devices designed with the
mobile phone in mind, the AS3911 is positioned perfectly for
the infrastructure side of the NFC system, where users need
optimal RF performance and flexibility combined with low
power.
With ams’ unique Automatic Antenna Tuning technology, the
device is optimized for applications with directly driven
antennas. The AS3911 is alone in the domain of HF Reader ICs
in that it contains two differential low impedance (1Ω) antenna
drivers.
The AS3911 includes several features, which make it
incomparable for low power applications. It contains a low
power capacitive sensor, which can be used to detect the
presence of a card without switching on the reader field.
Additionally, the presence of a card can also be detected by
performing a measurement of amplitude or phase of signal on
antenna LC tank and comparing it to stored reference. It also
contains a low power RC oscillator and wake-up timer, which
can be used to wake the system after a defined time period and
check for the presence of a tag using one or more techniques
of low power detection of card presence (capacitive, phase or
amplitude).
The AS3911 is designed to operate from a wide power supply
range from 2.4V to 5.5V; peripheral interface IO pins support
power supply range from 1.65V to 5.5V.
For further understanding in regards to the contents of the
datasheet, please refer to the Reference Guide located at the end
of the document.
General Description
AS3911 – 2 ams Datasheet, Confidential: 2013-Oct [2-03]
General Description
Key Benefits & Features
The benefits and features of AS3911, NFC Initiator / HF Reader
IC are listed below:
Figure 1:
Added Value for AS3911
Benefits Features
NFC Active P2P support ISO 18092 (NFCIP-1) Active P2P
ISO14443 A, B and FeliCa (TM)
High data transfer with ASK VHBR and fast
SPI
Support of VHBR (3.4 Mbit/s PICC to PCD framing, 6.8 Mbit/s AFE
and PCD to PICC framing)
6μA consumption at sensing every 100ms Capacitive sensing - Wake-up
Antenna tuning on the fly
Automatic Antenna Tuning system providing tuning of antenna
LC tank
Stable modulation index at ASK modulation Automatic modulation index adjustment
No communication holes
AM and PM (I/Q) demodulator channels with automatic
selection
High output power for EMVCo readers Up to 1 W in case of differential output
High Rx sensitivity User selectable and automatic gain control
Allows implementation of custom framings
Transparent and Stream modes to implement other standard
and custom protocols
Multi Antenna support Possibility of driving two antennas in single ended mode
Smaller Oscillator size
Oscillator input capable of operating with 13.56 MHz or 27.12
MHz crystal with fast start-up
Easy FIFO handling 10 M bit SPI with 96 bytes FIFO
Wide supply voltage range from 2.4 V to 5.5 V
Fits Temperature requirements for various
applications
Wide temperature range: -40°C to 125°C
Small outline, good cooling through
exposed pad
QFN 5x5 LD32 package
ams Datasheet, Confidential: 2013-Oct [2-03] AS3911 – 3
General Description
Applications
The AS3911 is suitable for a wide range of applications
including:
• EMV Payment
• Access Control
• NFC Infrastructure
•Ticketing
Block Diagram
The functional blocks of this device for reference are
shown below:
Figure 2:
AS3911 Block Diagram
POR & Bias
A/D
Converter
XTO
XTI
RFO
1
RFO
2
RFI1
RFI2
VDD
CSI
CSO
VDD_IO
AS3911
Regulators
XTAL
Oscillator
RC
Oscillator
A/D Converter
Transmitter
Phase &
Amplitude
Detector
Receiver
External Field
Detector
Capacitor
Sensor
LOGIC
FIFO
Control
Logic
SPI
Interface
Framing
Wake-up
Timer
TRIMx
SPI
Level
Shifters
IRQ
MCU_CLK
POR & Bias
AS3911 – 4 ams Datasheet, Confidential: 2013-Oct [2-03]
Pin Assignment
The AS3911 pin assignments are described below.
Figure 3:
Pin Diagram
Figure 4:
Pin Description
AS3911 Pin Assignment: This figure
shows the pin assignment and location
viewed from top.
Pin Number
Pin Name Pin Type Description
32-pin QFN
1
V
DD_IO
Supply pad Positive supply for peripheral communication
2 CSO
Analog
output
Capacitor sensor output
3 VSP_D Digital supply regulator output
4 XTO Xtal oscillator output
5XTI
Analog input
/ Digital input
Xtal oscillator input
6 VSN_D Supply pad Digital ground
7VSP_A
Analog
output
Analog supply regulator output
8
V
DD
Supply pad External positive supply
Pin Assignment
AS3911
9
2526272829303132
/SS
SCLK
MOSI
MISO
MCU_CLK
IRQ
VSN_A
CSI
16151413121110
VSP_RF
RFO1
RFO2
VSN_RF
TRIM1_3
TRIM2_3
TRIM1_2
TRIM2_2
24
23
22
21
20
19
18
17
AGD
RFI2
RFI1
VSS
TRIM2_0
TRIM1_0
TRIM2_1
TRIM1_1
1
2
3
4
5
6
7
8
VDD_IO
VSP_D
CSO
XTO
XTI
VSN_D
VSP_A
VDD
ams Datasheet, Confidential: 2013-Oct [2-03] AS3911 – 5
Pin Assignment
Note: Pins in bold have different functionality in comparison to the AS3910.
9VSP_RF
Analog
output
Supply regulator output for antenna drivers
10 RFO1
Antenna driver output
11 RFO2
12 VSN_RF Supply pad Ground of antenna drivers
13 TRIM1_3
Analog input Input to trim antenna resonant circuit
14 TRIM2_3
15 TRIM1_2
16 TRIM2_2
17 TRIM1_1
18 TRIM2_1
19 TRIM1_0
20 TRIM2_0
21
VSS
Supply pad Ground, die substrate potential
22 RFI1
Analog input Receiver input
23 RFI2
24 AGD Analog I/O Analog reference voltage
25 CSI Analog input Capacitor sensor input
26 VSN_A Supply pad Analog ground
27 IRQ
Digital output
Interrupt request output
28 MCU_CLK Microcontroller clock output
29 MISO
Digital output
/ tristate
Serial Peripheral Interface data output
30 MOSI
Digital input
Serial Peripheral Interface data input
31 SCLK Serial Peripheral Interface clock
32 /SS Serial Peripheral Interface enable (active low)
# VSS Exposed Pad Ground, die substract potential, connect to VSS on PCB
Pin Number
Pin Name Pin Type Description
32-pin QFN
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