C8051F00x-01x例程

//----------------------------------------------------------------------------- // F0xx_SMBus_EEPROM.c //----------------------------------------------------------------------------- // Copyright 2006 Silicon Laboratories, Inc. // http://www.silabs.com // // Program Description: // // This example demonstrates how the C8051F0xx ('F005 family) SMBus interface // can communicate with a 256 byte I2C Serial EEPROM (Microchip 24LC02B). // - Interrupt-driven SMBus implementation // - Only master states defined (no slave or arbitration) // - Timer3 used by SMBus for SCL low timeout detection // - SCL frequency defined by <SMB_FREQUENCY> constant // - Pinout: // P0.0 -> SDA (SMBus) // P0.1 -> SCL (SMBus) // // P1.6 -> LED // // all other port pins unused // // How To Test: // // 1) Download code to a 'F0xx device that is connected to a 24LC02B serial // EEPROM (see the EEPROM datasheet for the pinout information). // 2) Run the code: // a) the test will indicate proper communication with the EEPROM by // turning on the LED at the end the end of the test // b) the test can also be verified by running to the if statements // in main and checking the sent and received values by adding // the variables to the Watch Window // // FID: 00X000009 // Target: C8051F0xx ('F005 TB) // Tool chain: Keil C51 7.50 / Keil EVAL C51 // Command Line: None // // Release 1.0 // -Initial Revision (TP) // -20 APR 2006 // //----------------------------------------------------------------------------- // Includes //----------------------------------------------------------------------------- #include <C8051F000.h> // SFR declarations //----------------------------------------------------------------------------- // Global CONSTANTS //----------------------------------------------------------------------------- #define SYSCLK 4000000L // System clock frequency in Hz #define SMB_FREQUENCY 10000L // Target SCL clock rate // This example supports between 10kHz // and 100kHz #define WRITE 0x00 // WRITE direction bit #define READ 0x01 // READ direction bit // Device addresses (7 bits, lsb is a don't care) #define EEPROM_ADDR 0xA0 // Device address for slave target // Note: This address is specified // in the Microchip 24LC02B // datasheet. #define MY_ADDR 0x02 // Address of this SMBus device // (dummy value since this device does // not have any defined slave states) // SMBus Buffer Size #define SMB_BUFF_SIZE 0x08 // Defines the maximum number of bytes // that can be sent or received in a // single transfer #define SMB_BUS_ERROR 0x00 // (all modes) BUS ERROR #define SMB_START 0x08 // (MT & MR) START transmitted #define SMB_RP_START 0x10 // (MT & MR) repeated START #define SMB_MTADDACK 0x18 // (MT) Slave address + W transmitted; // ACK received #define SMB_MTADDNACK 0x20 // (MT) Slave address + W transmitted; // NACK received #define SMB_MTDBACK 0x28 // (MT) data byte transmitted; // ACK rec'vd #define SMB_MTDBNACK 0x30 // (MT) data byte transmitted; // NACK rec'vd #define SMB_MTARBLOST 0x38 // (MT) arbitration lost #define SMB_MRADDACK 0x40 // (MR) Slave address + R transmitted; // ACK received #define SMB_MRADDNACK 0x48 // (MR) Slave address + R transmitted; // NACK received #define SMB_MRDBACK 0x50 // (MR) data byte rec'vd; // ACK transmitted #define SMB_MRDBNACK 0x58 // (MR) data byte rec'vd; // NACK transmitted //----------------------------------------------------------------------------- // Global VARIABLES //----------------------------------------------------------------------------- unsigned char* pSMB_DATA_IN; // Global pointer for SMBus data // All receive data is written here unsigned char SMB_SINGLEBYTE_OUT; // Global holder for single byte writes. unsigned char* pSMB_DATA_OUT; // Global pointer for SMBus data. // All transmit data is read from here unsigned char SMB_DATA_LEN; // Global holder for number of bytes // to send or receive in the current // SMBus transfer. unsigned char WORD_ADDR; // Global holder for the EEPROM word // address that will be accessed in // the next transfer unsigned char TARGET; // Target SMBus slave address bit SMB_BUSY = 0; // Software flag to indicate when the // EEPROM_ByteRead() or // EEPROM_ByteWrite() // functions have claimed the SMBus bit SMB_RW; // Software flag to indicate the // direction of the current transfer bit SMB_SENDWORDADDR; // When set, this flag causes the ISR // to send the 8-bit <WORD_ADDR> // after sending the slave address. bit SMB_RANDOMREAD; // When set, this flag causes the ISR // to send a START signal after sending // the word address. // For the 24LC02B EEPROM, a random read // (a read from a particular address in // memory) starts as a write then // changes to a read after the repeated // start is sent. The ISR handles this // switchover if the <SMB_RANDOMREAD> // bit is set. bit SMB_ACKPOLL; // When set, this flag causes the ISR // to send a repeated START until the // slave has acknowledged its address // 16-bit SFR declarations sfr16 TMR3RL = 0x92; // Timer3 reload registers sfr16 TMR3 = 0x94; // Timer3 counter registers sbit LED = P1^6; // LED on P1.6 sbit SDA = P0^0; // SMBus on P0.0 sbit SCL = P0^1; // and P0.1 //----------------------------------------------------------------------------- // Function PROTOTYPES //----------------------------------------------------------------------------- void Port_Init(void); void SMBus_Init(void); void Timer3_Init(void); void SMBus_ISR(void); void Timer3_ISR(void); void EEPROM_ByteWrite(unsigned char addr, unsigned char dat); void EEPROM_WriteArray(unsigned char dest_addr, unsigned