tps75003外围电路资源-CSDN文库

需积分: 10 33 浏览量 2013-04-27 21:15:26 上传评论收藏 732KB PDF 举报

TPS75003外围电路 TPS75003是一款专为FPGA、DSP及其他多供电应用设计的完整电源管理解决方案，由德州仪器(Texas Instruments)生产。这款集成电路能够在2.2V到6.5V的输入电压范围内工作，并为多种设备提供稳定的供电。它集成有两个效率高达95%的3A降压控制器和一个300mA的低压差线性稳压器(LDO)。TPS75003支持可调整的输出电压，降压控制器的输出电压范围为1.2V至6.5V，LDO的输出电压范围为1.0V至6.5V。该芯片特别适合于功耗大和小的设备，例如Xilinx Spartan系列FPGA，因为它已经过Xilinx的测试并得到认可。 TPS75003的特性包括独立软启动和独立使能功能，这为设计灵活的电源顺序提供了可能。独立的软启动功能限制了每个供应的浪涌电流，从而减少了在启动过程中的功率需求。独立的使能控制功能则可以用来最小化在启动时对电源的需求。该芯片还具备小型化的特点，采用了4.5mm x 3.5mm x 0.9mm的小型、低轮廓QFN封装。 TPS75003的应用范围很广，包括FPGA、DSP、ASIC的供电，以及机顶盒、DSL调制解调器和等离子电视显示屏面板等。它被设计用于能够满足FPGA、DSP等设备启动时对电压的要求，这包括单调的电压斜坡和最小的电压轨上升时间。TPS75003的输出具备独立的软启动特性，这有助于限制电流的浪涌，优化了功耗管理。该设备支持用户编程的选项，从而提供了最大的灵活性。TPS75003的温度规格从-40°C到+85°C，能够在恶劣的环境温度下稳定工作，并提供高质量的电源管理解决方案。芯片的封装和尺寸确保了在紧凑的空间内提供高效的功耗管理。需要注意的是，在使用TPS75003时，应留意德州仪器提供的关于产品可用性、标准保修以及在关键应用中使用的免责声明。同时，Spartan是Xilinx公司的注册商标，而TPS75003的其他商标则归各自的拥有者所有。在设计和实施TPS75003外围电路时，需要仔细阅读和理解官方提供的数据手册。该手册提供了芯片的详细信息，包括电气特性、封装信息、应用电路图以及测试条件等，这对于确保电路设计的成功至关重要。在设计过程中，设计者应该参考德州仪器提供的所有规格和指南，确保TPS75003在特定应用中能够可靠地运行，同时遵守所有相关的安全标准和规定。

资源推荐

资源详情

资源评论

IN1

IN2

IN3

EN 1

SS1

EN 2

SS2

EN 3

IS1

SW 1

FB 1

IS2

SW 2

FB 2

OU T3

FB 3

DG ND

BU CK 1

BU CK 2

300m A

LD O

SS3

DGND

AG ND

DGND

TPS75003

CCAUX

2.5Vat300mA

CCO

3.3Vat3A

CCINT

1.2Vat3A

CCAUX

5V _Input

TPS75003

www.ti.com

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

Triple-Supply Power Management IC

for Powering FPGAs and DSPs

Check for Samples: TPS75003

FEATURES

DESCRIPTION

• Two 95% Efficient, 3A Buck Controllers and

The TPS75003 is a complete power management

One 300mA LDO

solution for FPGA, DSP and other multi-supply

applications. The device has been tested with and

• Tested and Endorsed by Xilinx for Powering

meets all of the Xilinx Spartan-3, Spartan-3E and

the Spartan™-3, Spartan-3E and Spartan-3L

Spartan-3L start-up profile requirements, including

FPGAs

monotonic voltage ramp and minimum voltage rail

• Adjustable (1.2V to 6.5V for Bucks, 1.0V to

rise time. Independent Enables for each output allow

6.5V for LDO) Output Voltages on All Channels

sequencing to minimize demand on the power supply

at start-up. Soft-start on each supply limits inrush

• Input Voltage Range: 2.2V to 6.5V

current during start-up. Two integrated buck

• Independent Soft-Start for Each Supply

controllers allow efficient, cost-effective voltage

• Independent Enable for Each Supply for

conversion for both low and high current supplies

Flexible Sequencing

such as core and I/O. A 300mA LDO is integrated to

provide an auxiliary rail such as V

CCAUX

on the Xilinx

• LDO Stable with 2.2mF Ceramic Output Cap

Spartan-3 FPGA. All three supply voltages are

• Small, Low-Profile 4.5mm x 3.5mm x 0.9mm

offered in user-programmable options for maximum

QFN Package

flexibility.

The TPS75003 is fully specified from –40°C to +85°C

APPLICATIONS

and is offered in a QFN package, yielding a highly

• FPGA/DSP/ASIC Supplies

compact total solution size with high power

• Set-Top Boxes

dissipation capability.

• DSL Modems

• Plasma TV Display Panels

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Spartan is a trademark of Xilinx, Inc.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS75003

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

(1)

PRODUCT V

OUT

Buck1: Adjustable

TPS75003 Buck2: Adjustable

LDO: Adjustable

(1) For the most current specifications and package information, see the Package Option Addendum located at the end of this document, or

see the TI website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

Over operating free-air temperature range (unless otherwise noted)

(1)

TPS75003 UNIT

INX

range (IN1, IN2, IN3) –0.3 to +7.0 V

ENX

range (EN1, EN2, EN3) –0.3 to V

INX

+0.3 V

SWX

range (SW1, SW2, SW3) –0.3 to V

INX

+0.3 V

ISX

range (IS1, IS2, IS3) –0.3 to V

INX

+0.3 V

OUT3

range –0.3 to +7.0 V

SSX

range (SS1, SS2, SS3) –0.3 to V

INX

+0.3 V

FBX

range (FB1, FB2, FB3) –0.3 to +3.3 V

Peak LDO output current (I

OUT3

) Internally limited —

Continuous total power dissipation See Dissipation Ratings Table —

Junction temperature range, T

–55 to +150 °C

Storage temperature range –65 to +150 °C

ESD rating, HBM 1 kV

ESD rating, CDM 500 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics

is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

THERMAL INFORMATION

TPS75003

THERMAL METRIC

(1)(2)

UNITS

RHL (20 PINS)

Junction-to-ambient thermal resistance 42.6

JCtop

Junction-to-case (top) thermal resistance 51.8

Junction-to-board thermal resistance 39.5

°C/W

Junction-to-top characterization parameter 0.6

Junction-to-board characterization parameter 14.2

JCbot

Junction-to-case (bottom) thermal resistance 2.8

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

Product Folder Link(s): TPS75003

TPS75003

www.ti.com

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

ELECTRICAL CHARACTERISTICS

EN1

= V

IN1

, V

EN2

= V

IN2

, V

EN3

= V

IN3

, V

IN1

= V

IN2

= 2.2V, V

IN3

= 3.0V, V

OUT3

= 2.5V, C

OUT1

= C

OUT2

= 47mF, C

OUT3

= 2.2mF,

= –40°C to +85°C, unless otherwise noted. Typical values are at T

= +25°C.

PARAMETER CONDITIONS MIN TYP MAX UNIT

Supply and Logic

Input Voltage Range

INX

2.2 6.5 V

(IN1, IN2, IN3)

(1)

Quiescent Current, I

= I

DGND

OUT1

= I

OUT2

= 0mA, I

OUT3

= 1mA 75 150 mA

AGND

SHDN

Shutdown Supply Current V

EN1

= V

EN2

= V

EN3

= 0V 0.05 3.0 mA

Enable High, enabled

IH1, 2

1.4 V

INX

(EN1, EN2)

IH3

Enable High, enabled (EN3) 1.14 V

IN3

Enable Low, shutdown

ILX

0 0.3 V

(EN1, EN2, EN3)

Enable pin current

ENX

0.01 0.5 mA

(EN1, EN2, EN3)

Buck Controllers 1 and 2

Adjustable Output Voltage

OUT1,2

FBX

INX

Range

(2)

FB1,2

Feedback Voltage (FB1, FB2) 1.220 V

Feedback Voltage Accuracy

(1)

–2 +2 %

(FB1, FB2)

FB1,2

Current into FB1, FB2 pins 0.01 0.5 mA

Reference Voltage for Current

IS1,2

80 100 120 mV

Sense

IS1,2

Current into IS1, IS2 Pins 0.01 0.5 mA

Measured with the circuit in Figure 1,

ΔV

OUT%

/ΔV

Line Regulation

(1)

0.1 % / V

OUT

+ 0.5V ≤ V

≤ 6.5V

ΔV

OUT%

/ΔI

Measured with the circuit in Figure 1,

Load Regulation 0.6 % / A

30mA ≤ I

OUT

≤ 2A

Measured with the circuit in Figure 1,

1,2

Efficiency

(3)

94 %

OUT

= 1A

Measured with the circuit in Figure 1,

STR1,2

Startup Time

(3)

5 ms

= 6Ω, C

OUT

= 100mF, C

= 2.2nF

Gate Driver P-Channel and V

IN1,2

> 2.5V 4

DS,ON1,2

N-Channel MOSFET Ω

IN1,2

= 2.2V 6

On-Resistance

Gate Driver P-Channel and

SW1,2

N-Channel MOSFET Drive 100 mA

Current

Minimum On Time 1.36 1.55 1.84 ms

OFF

Minimum Off Time 0.44 0.65 0.86 ms

(1) To be in regulation, minimum V

IN1

(or V

IN2

) must be greater than V

OUT1,NOM

(or V

OUT2,NOM

) by an amount determined by external

components. Minimum V

IN3

= V

OUT3

+ V

or 2.2V, whichever is greater.

(2) Maximum V

OUT

depends on external components and will be less than V

(3) Depends on external components.

Product Folder Link(s): TPS75003

剩余30页未读，继续阅读

评论收藏

内容反馈

samebeer

粉丝: 0
资源: 2

tps75003外围电路

TPS75003:三路FPGA高效率功率管理IC

电源技术中的3G移动视频监控系统电源电路图

TPS5430芯片及外围电路 +SATA接口 AD集成库（原理图库+PCB库）.zip

TPS54360外围电路TI官方计算器 计算0-60V输入，0-60V输出计算器

TPS23861原理图参考设计源文件DSN

TPS54620电路原理图 AD版本.SchDoc

TPS767D301资料及电路设计

基于TPS7350的智能车电源设计

TPS23751原理图参考设计源文件DSN（原理图第30页）

无线充电稳压模块TPS63020模块（包含原理图及PCB）

C5509外围电路封装库

TPS5430正负电源模块

单片机与DSP中的DSP外围电路设计

TPS65133-PCB设计工程文件

TPS5430正负电源.rar

TPS54310PWP的技术参数

基于TPS54202的DCDC电源模块设计

TPS54531芯片资料

基于TPS54160芯片的开关电源设计.pdf

TPS63020电赛资料

TPS

018电子设计竞赛TI公司TPS63020详细资料

TI tps707xx

TPS7350 datasheet

tps75133 稳压

TPS5450.rar

信号模拟器电路图设计

01_pcie接口引脚电路示例_AX991001

tps60151.zip_TPS60151_dcdc

最新资源

TPS54360外围电路TI官方计算器计算0-60V输入，0-60V输出计算器