Chapter3:AboutDesignElements
NAND3
Primitive:3-InputNANDGatewithNon-InvertedInputs
SupportedArchitectures
Thisdesignelementissupportedinthefollowingarchitectures:
•XC9500
•CoolRunner™-II
•CoolRunnerXPLA3
Introduction
NANDelementsimplementNegatedANDorNOTAND.AHigh(1)outputresultswhenoneormoreinputs
areaLow(0).ALow(0)outputresultsonlyifallinputsareHigh(1).
NANDgatesofuptoveinputsareavailableinanycombinationofinvertingandnon-invertinginputs.NAND
gatesofsixtonineinputs,12inputs,and16inputsareavailablewithonlynon-invertinginputs.Toinvertinputs,
useexternalinverters.BecauseeachinputusesaCLBresource,replacegateswithunusedinputswithgates
havingthenecessarynumberofinputs.
LogicTable
InputOutput
I0...Iz
O
Allinputsare1
0
Anysingleinputis0
1
DesignEntryMethod
Thisdesignelementisonlyforuseinschematics.
ForMoreInformation
•SeetheappropriateCPLDUserGuide.
•SeetheappropriateCPLDDataSheets.
CPLDLibrariesGuide
UG606(v14.7)October2,2013