TPS2543USBcharging资源-CSDN文库

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OUT

GND

FAULT

ILIM_LO

STATUS

(10 kW)

Power Switch EN

4.5V – 5.5V

TPS2543

0.1 uF

USB

Fault Signal

DM_IN

DP_IN

VBUS

D-

D+

GND

USB

Connector

To Portable Device à

Power Bus

CTL1

CTL2

CTL3

ILIM_SEL

ILIM Select

DM_OUT

DP_OUT

To Host Controller à

Mode Select I/O

STATUS

STATUS Signal

ILIM_HI

FAULT

(10 kW)

5 6 7 8

13141516

Thermal Pad

DM_OUT

DP_OUT

ILIM_SEL

CLT1

CLT2

CLT3

OUT

DM_IN

DP_IN

STATUS

ILIM_HI

ILIM_LO

GND

FAULT

TPS2543

www.ti.com

SLVSBA6 –FEBRUARY 2012

USB Charging Port Controller and Power Switch with Load Detection

Check for Samples: TPS2543

FEATURES

DESCRIPTION

The TPS2543 is a USB charging port controller and

• D+/D– CDP/DCP Modes per USB Battery

power switch with an integrated USB 2.0 high-speed

Charging Specification 1.2

data line (D+/D–) switch. The TPS2543 provides the

• D+/D– Shorted Mode per Chinese

electrical signatures on D+/D– to support the

Telecommunication Industry Standard YD/T

following charging schemes:

1591-2009

• USB Battery Charging Specification 1.2;

• D+/D– Divider Modes 2.0V/2.7V and 2.7/2.0V

• Chinese Telecom Standard YD/T 1591-2009;

Compliant with 1A and 2A Apple Mobile Digital

• Divider Mode, Compliant with Apple iPod, iPhone

Devices

(1A), and iPad (2A) Mobile Digital Devices.

(1)

• Automatic Selection of D+/D– Mode for an

The TPS2543 can be configured to automatically

Attached Device

select the D+/D– mode needed to charge an attached

• Supports Sleep-Mode Charging and

device. The TPS2543 provides load detection via the

Mouse/Keyboard (Low-Speed Only) Wake Up

STATUS pin that allows for both power supply control

in S4/S5 charging and the ability to manage port

• Load Detection for Both Power Supply Control

power in a multi-port application. Additionally, system

in S4/S5 Charging and Port Power

wake up (from S3) with a mouse/keyboard (low

Management in all Charge Modes

speed only) is fully supported in the TPS2343.

• Compatible with USB 2.0 and 3.0 Power Switch

The TPS2543 73-mΩ power-distribution switch is

Requirements

intended for applications where heavy capacitive

• 73-mΩ (typ) High-Side MOSFET

loads and short-circuits are likely to be encountered.

• Adjustable Current-Limit up to 3.0 A (typ)

Two programmable current thresholds provide

flexibility for setting current limits and load detect

• Operating Range: 4.5 V to 5.5 V

thresholds.

• Drop-In Compatible with TPS2540/40A

• Available in 16-Pin QFN (3x3) Package

• UL Listed and CB File No. E169910

APPLICATIONS

• USB Ports (Host and Hubs)

• Notebook Desktop PCs

(1) Apple, iPod, iPhone, and iPad are trademarks of Apple Inc.,

• Universal Wall Charging Adapters registered in the U.S. and other countries.

TPS2543 RTE PACKAGE AND TYPICAL APPLICATION DIAGRAM

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS2543

SLVSBA6 –FEBRUARY 2012

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

(1)

PACKAGE DEVICE TOP-SIDE MARKING

–40°C to 125°C QFN16 TPS2543 2543

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range, voltages are referenced to GND (unless otherwise noted)

LIMIT UNIT

Voltage range IN, EN, ILIM_LO, ILIM_HI, FAULT, STATUS, ILIM_SEL, –0.3 to 7 V

CTL1, CTL2, CTL3, OUT

IN to OUT –7 to 7

DP_IN, DM_IN, DP_OUT, DM_OUT –0.3 to (IN + 0.3) or 5.7

Input clamp current DP_IN, DM_IN, DP_OUT, DM_OUT ±20 mA

Continuous current in SDP or CDP DP_IN to DP_OUT or DM_IN to DM_OUT ±100 mA

mode

Continuous current in BC1.2 DCP DP_IN to DM_IN ±50 mA

mode

Continuous output current OUT Internally limited

Continuous output sink current FAULT, STATUS 25 mA

Continuous output source current ILIM_LO, ILIM_HI Internally limited mA

ESD rating HBM 2 kV

HBM wrt GND and each other, DP_IN, DM_IN 8

CDM 500 V

Operating junction temperature, T

–40 to Internally limited °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

THERMAL INFORMATION

TPS2543

THERMAL METRIC

(1)

UNITS

RTE (16 PIN)

Junction-to-ambient thermal resistance 53.4

JCtop

Junction-to-case (top) thermal resistance 51.4

Junction-to-board thermal resistance 17.2

°C/W

Junction-to-top characterization parameter 3.7

Junction-to-board characterization parameter 20.7

JCbot

Junction-to-case (bottom) thermal resistance 3.9

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

Product Folder Link(s): TPS2543

TPS2543

www.ti.com

SLVSBA6 –FEBRUARY 2012

RECOMMENDED OPERATING CONDITIONS

voltages are referenced to GND (unless otherwise noted)

MIN NOM MAX UNIT

Input voltage, IN 4.5 5.5 V

Input voltage, logic-level inputs, EN, CTL1, CTL2, CTL3, ILIM_SEL 0 5.5 V

Input voltage, data line inputs, DP_IN, DM_IN, DP_OUT, DM_OUT 0 V

High-level input voltage, EN, CTL1, CTL2, CTL3, ILIM_SEL 1.8 V

Low-level input voltage, EN, CTL1, CTL2, CTL3, ILIM_SEL 0.8 V

Continuous current, data line inputs, SDP or CDP mode, DP_IN to DP_OUT, DM_IN to

±30 mA

DM_OUT

Continuous current, data line inputs, BC1.2 DCP mode, DP_IN to DM_IN ±15 mA

OUT

Continuous output current, OUT 0 2.5 A

Continuous output sink current, FAULT, STATUS 0 10 mA

ILIM_XX

Current-limit set resistors 16.9 750 kΩ

Operating virtual junction temperature –40 125 °C

ELECTRICAL CHARACTERISTICS

Unless otherwise noted: –40 ≤ T

≤ 125°C, 4.5 V ≤ V

≤ 5.5 V, V

= V

, V

ILIM_SEL

= V

, V

CTL1

= V

CTL2

= V

CTL3

= V

. R

FAULT

STATUS

= 10 kΩ, R

ILIM_HI

= 20 kΩ, R

ILIM_LO

= 80.6 kΩ. Positive currents are into pins. Typical values are at 25°C. All voltages

are with respect to GND.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

POWER SWITCH

= 25°C, I

OUT

= 2 A 73 84

DS(on)

On resistance

(1)

–40°C ≤ T

≤ 85°C, I

OUT

= 2 A 73 105 mΩ

–40°C ≤ T

≤ 125°C, I

OUT

= 2 A 73 120

OUT voltage rise time 0.7 1.0 1.60

= 5 V, C

= 1 µF, R

= 100 Ω (see Figure 23 and

Figure 24)

OUT voltage fall time 0.2 0.35 0.5

OUT voltage turn-on time 2.7 4

= 5V, C

= 1 µF, R

= 100 Ω (see Figure 23 and

Figure 25)

off

OUT voltage turn-off time 1.7 3

OUT

= 5.5 V, V

= V

= 0 V, –40 ≤ T

≤ 85°C,

REV

Reverse leakage current 2 µA

Measure I

OUT

DISCHARGE

DCHG

OUT discharge resistance V

OUT

= 4 V, V

= 0 V 400 500 630 Ω

DCHG

OUT discharge hold time Time V

OUT

< 0.7 V (see Figure 26) 205 310 450 ms

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; Thermal effects must be taken into account

separately.

Product Folder Link(s): TPS2543

TPS2543

SLVSBA6 –FEBRUARY 2012

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

Unless otherwise noted: –40 ≤ T

≤ 125°C, 4.5 V ≤ V

≤ 5.5 V, V

= V

, V

ILIM_SEL

= V

, V

CTL1

= V

CTL2

= V

CTL3

= V

. R

FAULT

STATUS

= 10 kΩ, R

ILIM_HI

= 20 kΩ, R

ILIM_LO

= 80.6 kΩ. Positive currents are into pins. Typical values are at 25°C. All voltages

are with respect to GND.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

EN, ILIMSEL, CTL1, CTL2, CTL3 INPUTS

Input pin rising logic threshold

1 1.35 1.70 V

voltage

Input pin falling logic threshold

0.85 1.15 1.45

voltage

Hysteresis

(2)

200 mV

Input current Pin voltage = 0 V or 5.5 V –0.5 0.5 µA

ILIMSEL CURRENT LIMIT

ILIM_SEL

= 0 V, R

ILIM_LO

= 210 kΩ 205 240 275

ILIM_SEL

= 0 V, R

ILIM_LO

= 80.6 kΩ 575 625 680

OUT short circuit current limit

(3)

ILIM_SEL

= 0 V, R

ILIM_LO

= 22.1 kΩ 2120 2275 2430 mA

ILIM_SEL

= V

, R

ILIM_H

I = 20 kΩ 2340 2510 2685

ILIM_SEL

= V

, R

ILIM_HI

= 16.9 kΩ 2770 2970 3170

Response time to OUT short- V

= 5.0 V, R = 0.1Ω, lead length = 2 inches (see

IOS

1.5 µs

circuit

(2)

Figure 27)

SUPPLY CURRENT

IN_OFF

Disabled IN supply current V

= 0 V, V

OUT

= 0 V, –40 ≤ T

≤ 85°C 2 µA

CTL1

= V

CTL2

= V

, V

CTL3

= 0 V or V

, V

ILIM_SEL

= 0 V 155 210

CTL1

= V

CTL2

= V

, V

CTL3

= 0V, V

ILIM_SE

L = V

175 230

IN_ON

Enabled IN supply current µA

CTL1

= V

CTL2

= V

, V

CTL3

= VIN, V

ILIM_SEL

= V

185 240

CTL1

= 0V, V

CTL2

= V

CTL3

= V

205 260

UNDERVOLTAGE LOCKOUT

UVLO

IN rising UVLO threshold voltage 3.9 4.1 4.3 V

Hysteresis

(2)

100 mV

FAULT

Output low voltage I

FAULT

= 1 mA 100 mV

Off-state leakage V

FAULT

= 6.5 V 1 µA

Over current FAULT rising and

5 8.2 12 ms

falling deglitch

STATUS

Output low voltage I

STATUS

= 1 mA 100 mV

Off-state leakage V

STATUS

= 6.5 V 1 µA

THERMAL SHUTDOWN

Thermal shutdown threshold 155

Thermal shutdown threshold in

135 °C

current-limit

Hysteresis

(2)

(2) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's

product warranty.

(3) Pulse-testing techniques maintain junction temperature close to ambient temperature; Thermal effects must be taken into account

separately.

Product Folder Link(s): TPS2543

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