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TPS56528器件规格书.pdf
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TPS56528器件规格书.pdf
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Vout( 50mV/div)
Iout( 2A/div)
100us/div
TPS56528
TPS56528
www.ti.com.cn
ZHCSAZ6A –APRIL 2013–REVISED APRIL 2013
具具有有高高级级 Eco-mode™ 的的 4.5V 至至 18V 输输入入,,5A 同同步步降降压压转转换换器器
查查询询样样品品: TPS56528
1
特特性性
说说明明
23
• D-CAP2™ 模模式式支支持持快快速速瞬瞬态态响响应应
TPS56528 是一款自适应接通时间 D-CAP2™ 模式同
步降压转换器。 TPS56528 可帮助系统设计人员通过
• 低低输输出出纹纹波波,,支支持持陶陶瓷瓷输输出出电电容容器器
一个成本有效、低组件数、低待机电流解决方案来完成
• 宽宽泛泛的的 V
IN
输输入入电电压压范范围围::4.5V 至至 18V
各种终端设备的电源总线调节器集。 TPS56528 的主
• 输输出出电电压压范范围围::0.6V 至至 7V
控制环路使用 D-CAP2™ 模式控制,此控制方式提供
• 高高效效率率集集成成型型场场效效应应晶晶体体管管 (FET)
针针对对更更低低占占空空比比应应用用进进行行了了优优化化
一个无需外部补偿组件的快速瞬态响应。 自适应接通
-68mΩ((高高侧侧))与与 37mΩ((低低侧侧))
时间控制支持更高负载情况下的脉宽调制 (PWM) 模式
• 关关断断时时的的高高效效率率,,流流耗耗不不足足 10μA
与轻负载下的高级 Eco-mode™ 运行之间的无缝转
• 高高初初始始带带隙隙基基准准精精度度
换。 高级 Eco-mode™ 使 TPS56528 能够在较轻负载
• 预预偏偏置置软软启启动动
条件下保持高效率。 TPS56528 的私有电路还使该器
• 650 kHz 开开关关频频率率 (f
SW
)
件能够使用诸如高分子有机半导体固体电容器
• 逐逐周周期期限限流流
(POSCAP) 或 SP-CAP 等低等效串联电阻 (ESR) 输出
• 高高级级自自动动跳跳跃跃 Eco-mode™ 为为了了在在轻轻负负载载下下实实现现高高
电容器以及超低 ESR 陶瓷电容器。 该器件的工作输入
效效率率
电压介于 4.5V 至 18V VIN 之间。 输出电压可在 0.6V
• 电电源源正正常常输输出出
与 7V 之间进行设定。此外,该器件还特有一个固定值
• 固固定定软软启启动动时时间间::1.0ms
为 1.0ms 的软启动时间和电源正常输出功能。
TPS56528 采用 8 引脚 DDA 封装,并针对 -40°C 到
应应用用范范围围
85°C 的工作温度范围内的运行而设计。
• 低低电电压压系系统统的的广广泛泛应应用用
– 数数字字电电视视电电源源
– 高高清清 Blu-ray Disc™ 播播放放器器
– 网网络络家家庭庭终终端端设设备备
– 数数字字机机顶顶盒盒 (STB)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2D-CAP2, Eco-mode, advanced Eco-mode are trademarks of Texas Instruments.
3Blu-ray Disc is a trademark of Blu-ray Disc Association.
PRODUCTION DATA information is current as of publication date.
Copyright © 2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not English Data Sheet: SLVSBV3
necessarily include testing of all parameters.
TPS56528
ZHCSAZ6A –APRIL 2013–REVISED APRIL 2013
www.ti.com.cn
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
TRANSPORT
T
A
PACKAGE
(2) (3)
ORDERABLE PART NUMBER PIN
MEDIA
TPS56528DDA Tube
–40°C to 85°C DDA 8
TPS56528DDAR Tape and Reel
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) All package options have Cu NIPDAU lead/ball finish.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
MIN MAX
VIN, EN –0.3 20
VBST –0.3 26
VBST (10 ns transient) –0.3 28
Input voltage range VBST (vs SW) –0.3 6.5 V
VFB, PG –0.3 6.5
SW –2 20
SW (10 ns transient) –3 22
VREG5 –0.3 6.5
Output voltage range V
GND –0.3 0.3
Voltage from GND to thermal pad, V
diff
–0.2 0.2 V
Human Body Model (HBM) 2 kV
Electrostatic discharge
Charged Device Model (CDM) 500 V
Operating junction temperature, T
J
–40 150
°C
Storage temperature, T
stg
–55 150
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS56528
THERMAL METRIC
(1)
UNITS
DDA (8 PINS)
θ
JA
Junction-to-ambient thermal resistance 44.4
θ
JCtop
Junction-to-case (top) thermal resistance 51.6
θ
JB
Junction-to-board thermal resistance 27.8
°C/W
ψ
JT
Junction-to-top characterization parameter 8.7
ψ
JB
Junction-to-board characterization parameter 27.7
θ
JCbot
Junction-to-case (bottom) thermal resistance 5.3
(1) 有关传统和新的热 度量的更多信息,请参阅IC
封装热度量
应用报告, SPRA953。
2 Copyright © 2013, Texas Instruments Incorporated
TPS56528
www.ti.com.cn
ZHCSAZ6A –APRIL 2013–REVISED APRIL 2013
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range, (unless otherwise noted)
MIN MAX UNIT
V
IN
Supply input voltage range 4.5 18 V
VBST –0.1 24
VBST (10 ns transient) –0.1 27
VBST(vs SW) –0.1 6.0
PG –0.1 5.7
V
I
Input voltage range EN –0.1 18 V
VFB –0.1 5.5
SW –1.8 18
SW (10 ns transient) –3 21
GND –0.1 0.1
V
O
Output voltage range VREG5 –0.1 5.7 V
I
O
Output Current range I
VREG5
0 5 mA
T
A
Operating free-air temperature –40 85 °C
T
J
Operating junction temperature –40 150 °C
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, V
IN
= 12 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
V
IN
current, T
A
= 25°C, EN = 5 V,
I
VIN
Operating - non-switching supply current 170 350 μA
V
FB
= 0.7 V
I
VINSDN
Shutdown supply current V
IN
current, T
A
= 25°C, EN = 0 V 3.8 10 µA
LOGIC THRESHOLD
EN high-level input voltage EN 1.6 V
V
EN
EN low-level input voltage EN 0.6 V
R
EN
EN pin resistance to GND V
EN
= 12 V 180 350 700 kΩ
V
FB
VOLTAGE AND DISCHARGE RESISTANCE
T
A
= 25°C, V
O
= 1.05 V, I
O
= 10 mA, advanced
606 mV
Eco-mode™ operation
T
A
= 25°C, V
O
= 1.05 V, continuous mode
V
FBTH
V
FB
threshold voltage 593 600 607 mV
operation
T
A
= -40 to 85°C, V
O
= 1.05 V, continuous
588 600 612 mV
mode operation
(1)
I
VFB
V
FB
input current V
FB
= 0.7 V, T
A
= 25°C 0 ±0.15 µA
SW DISCHARGE
I
DISCHG
SW discharge current EN = 0 V, SW = 1 V, T
A
= 25°C 1.0 1.5 mA
V
REG5
OUTPUT
T
A
= 25°C, 6.0 V < V
IN
< 18 V,
V
VREG5
V
REG5
output voltage 5.2 5.5 5.7 V
0 < I
VREG5
< 5 mA
I
VREG5
Output current V
IN
= 6 V, V
REG5
= 4.0 V, T
A
= 25°C 20 mA
MOSFET
High side switch resistance 25°C, V
BST
- SW = 5.5 V 68 mΩ
R
DS(on)
Low side switch resistance 25°C 37 mΩ
CURRENT LIMIT
I
ocl
Current limit L out = 1.5 µH
(1)
5.5 6.2 7.8 A
(1) Not production tested.
Copyright © 2013, Texas Instruments Incorporated 3
TPS56528
ZHCSAZ6A –APRIL 2013–REVISED APRIL 2013
www.ti.com.cn
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range, V
IN
= 12 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
THERMAL SHUTDOWN
Shutdown temperature
(2)
165
T
SDN
Thermal shutdown threshold °C
Hysteresis
(2)
35
ON-TIME TIMER CONTROL
t
ON
On time V
IN
= 12 V, V
O
= 1.05 V 150 ns
t
OFF(MIN)
Minimum off time T
A
= 25°C, V
FB
= 0.5 V 260 310 ns
SOFT START
t
SS
Soft-start time Internal soft-start time 0.7 1.0 1.3 ms
POWER GOOD
VFB rising(good) 85% 90% 95%
V
THPG
PG threshold
VFB falling(Fault) 85%
IPG PG sink current PG=0.5V 2 4 mA
OUTPUT UNDERVOLTAGE AND OVERVOLTAGE PROTECTION
V
OVP
Output OVP threshold OVP Detect (L>H) 125%
V
UVP
Output UVP threshold UVP detect (H>L) 65%
t
UVPDEL
Output UVP delay to Hiccup state 7 µs
t
UVPEN
Output UVP Enable delay Relative to soft-start time x1.7
UVLO
Wake up V
REG5
voltage 3.45 3.75 4.05
UVLO UVLO threshold V
Hysteresis V
REG5
voltage 0.13 0.32 0.48
(2) Not production tested.
4 Copyright © 2013, Texas Instruments Incorporated
POWER PAD
TPS56528
DDA
HSOP8
SW
VBST
PG
VFB
GND
8
2
3
4
1
EN
VREG5
7
6
5
VIN
TPS56528
www.ti.com.cn
ZHCSAZ6A –APRIL 2013–REVISED APRIL 2013
DEVICE INFORMATION
DDA PACKAGE
(TOP VIEW)
PIN FUNCTIONS
PIN
DESCRIPTION
NAME NO.
EN 1 Enable input control. Active high and must be pulled up to enable the device.
VFB 2 Converter feedback input. Connect to output voltage with feedback resistor divider.
5.5 V power supply output. A capacitor (typical 0.47 µF) should be connected to GND. VREG5 is not
VREG5 3
active when EN is low.
PG 4 Open drain power good output.
Ground pin. Power ground return for switching circuit. Connect sensitive SS and VFB returns to GND at
GND 5
a single point.
SW 6 Switch node connection between high-side NFET and low-side NFET.
Supply input for the high-side FET gate drive circuit. Connect 0.1µF capacitor between VBST and SW
VBST 7
pins. An internal diode is connected between VREG5 and VBST.
VIN 8 Input voltage supply pin.
Exposed Thermal Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to
Back side
Pad GND.
Copyright © 2013, Texas Instruments Incorporated 5
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