A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_INTR
H_INIT#
H_PWRGD
H_A20M#
CPU_RESET#
H_IGNNE#
H_SMI#
H_VCCA
H_VSSA
COMP1
COMP3
H_STPCLK#
H_CPU_CLKSEL0
H_CPU_CLKSEL1
H_TESTHI1
H_CPU_CLKSEL2
H_TESTHI2_7
H_TESTHI11
H_TESTHI12
H_TESTHI8
H_TESTHI9
H_TESTHI10
H_TESTHI0
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TMS
ITP_TRST#
H_THERMDC
H_THERMDA
H_THERMTRIP#
H_NMI
+GTLREF
+GTLREF
H_CPUSLP#
ITP_TCK
ITP_TMS
ITP_TRST#
ITP_TDI
COMP2
COMP0
H_THERMTRIP#
H_RS#2
H_RS#0
H_RS#1
VID_PWRGD
+VTT_OUT_LEFT
H_CPU_CLKSEL1
H_CPU_CLKSEL2
H_CPU_CLKSEL0
H_VID0
H_INTR
H_INIT#
H_IGNNE#
H_A20M#
H_NMI
H_STPCLK#
H_SMI#
H_PWRGD
H_CPUSLP#
CPU_RESET#
H_FERR#
H_THERMDA
H_THERMDC
H_VID1
H_VID3
H_VID1
H_VID5
H_VID4
H_VID0
H_VID2
+VTT_OUT_RIGHT
H_VID5
H_VID3
H_VID2
H_VID4
CPU_RESET#
H_RS#[0..2]7
H_INTR21
H_INIT#21
H_PWRGD21
H_A20M#21
H_IGNNE#21
H_SMI#21
H_DRDY#7
H_DBSY#7
H_STPCLK#21
H_NMI21
H_ADSTB#0 7
H_ADSTB#1 7
H_DINV#3 7
H_DINV#1 7
H_DINV#2 7
H_DINV#0 7
H_DSTBP#0 7
H_DSTBN#0 7
H_DSTBP#1 7
H_DSTBN#1 7
H_DSTBP#2 7
H_DSTBN#2 7
H_DSTBP#3 7
H_DSTBN#3 7
H_CPUSLP# 21
H_PROCHOT# 49
MAINPWON 43,44,46
VID_PWRGD6,50
CPU_CLKSEL0 8,13
CPU_CLKSEL1 8,13
CPU_CLKSEL2 8,13
H_VID5 50
H_VID1 50
H_VID2 50
H_VID4 50
H_VID3 50
H_VID0 50
H_TRDY#7
H_FERR#21
EC_SMB_DA233,37,53
EC_SMB_CK233,37,53
H_VCCSENSE
H_VSSSENSE
H_EDRDY# 7
H_PCREQ# 7
H_RESET#7
LDT_RST#21
+V_FSB_VTT
+VTT_OUT_LEFT
+CPU_CORE
+V_FSB_VTT
+V_FSB_VTT
+VTT_OUT_LEFT
+V_FSB_VTT
+VTT_OUT_RIGHT
+VTT_OUT_LEFT
+VTT_OUT_RIGHT
+3VS+V_FSB_VTT
+3VS+V_FSB_VTT
+3VS+V_FSB_VTT
+VTT_OUT_RIGHT
+VTT_OUT_LEFT
+V_FSB_VTT
+3VS
+VTT_OUT_LEFT
+V_FSB_VTT
+VTT_OUT_RIGHT
+V_FSB_VTT
+V_FSB_VTT
+VTT_OUT_RIGHT
+V_FSB_VTT
+VTT_OUT_LEFT
Title
Size Document Number Rev
Date: Sheet
of
Longbeach 100 <LA-2451>
0.1
LGA-775(2/3)
Custom
553, 06,
星期六 十一月
2004
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Note: Please change to 10uH, DC current
of 120mA parts and close to cap
DC Voltage drop from VTT to VCCA should
be < 70mV
1.Place cap within 600 mils of
the VCCA and VSSA pins.
2.H_VCCIOPLL,HVCCA,HVSSA trace wide
12 mils(min)
GTLREF Voltage
should be
0.63*VTT=0.75V
EDRDY#,H_PCREQ# is not a
feature of the Pentium 4 processor
in the 775-land package.
MS_ID[0:1] are provided to indicate the Market
Segment for the processor and may be used
for future processor compatibility.
Width : Space
10 :15(mil)
Reserve for Testability
Reserve for Testability
Un-used JTAG Pins,
Place Close to the CPU
Thermal Sensor
15mil
**
R147 200_0402_5%
1 2
R588680_0402_5%
1 2
R605
169_0402_1%
12
RP27680_1206_8P4R_5%
18
27
36
45
R55
1K_0402_5%
1 2
R593 @1K_0402_5%
1 2
R47
1K_0402_5%
1 2
Q4
MMBT3904_SOT23
2
3 1
C297 180P_0402_50V8J
1 2
R595
62_0402_5%
1 2
R153 200_0402_5%
1 2
C289 180P_0402_50V8J
1 2
R39
1K_0402_5%
1 2
C794
1U_0603_10V4Z
1
2
R608
100K_0805_5%
1 2
RP26 1K_1206_8P4R_5%
1 8
2 7
3 6
4 5
R602 62_0402_5%
1 2
R525 60.4_0402_1%
12
R148 200_0402_5%
1 2
R150 200_0402_5%
1 2
R191 62_0402_5%
1 2
L48 LQG21F4R7N00_0805
1 2
R154 200_0402_5%
1 2
R185 62_0402_5%
1 2
R591 0_0402_5%
1 2
R604 0_0402_5%
1 2
R56
560_0402_5%
1 2
R589
@10K_0402_5%
12
C622
10U_0805_10V4Z
1
2
R592 100_0402_1%
12
C296 180P_0402_50V8J
1 2
R601 62_0402_5%
1 2
C293 180P_0402_50V8J
1 2
R152 200_0402_5%
1 2
R599 62_0402_5%
1 2
R600 62_0402_5%
1 2
+
C680
33U_D2_8M_R35
1 2
R44
1K_0402_5%
1 2
Q7
MMBT3904_SOT23
2
3 1
R188
@62_0402_5%
1 2
C638
10U_0805_10V4Z
1
2
C793
0.1U_0402_16V4Z
1
2
C294 180P_0402_50V8J
1 2
L49 LQG21F4R7N00_0805
1 2
R60 62_0402_5%
1 2
C340
180P_0402_50V8J
1 2
R40
1K_0402_5%
1 2
R176 62_0402_5%
1 2
R586 60.4_0402_1%
12
R178 62_0402_5%
1 2
C789
0.1U_0402_16V4Z
1
2
Q6
MMBT3904_SOT23
2
3 1
C989
@1000P_0402_50V7K
1
2
Q46
MMBT3904_SOT23
2
3 1
C650
10U_0805_10V4Z
1
2
R603 62_0402_5%
1 2
R583 300_0402_5%
1 2
R59 62_0402_5%
1 2
R174680_0402_5%
1 2
Q47
MMBT3904_SOT23
2
3 1
C788
2200P_0402_50V7K
1
2
R192 62_0402_5%
1 2
C295 180P_0402_50V8J
1 2
R582 @0_0402_5%
1 2
R177 62_0402_5%
1 2
R186 0_0402_5%
1 2
C355 180P_0402_50V8J
1 2
C290 680P_0402_50V7K
1 2
C658
10U_0805_10V4Z
1
2
R149 200_0402_5%
1 2
R175 62_0402_5%
1 2
R58@1K_0402_5%
12
R584
62_0402_5%
12
R45
560_0402_5%
1 2
R585 100_0402_1%
12
R52
560_0402_5%
1 2
U37
ADM1032ARM_RM8
VDD1
1
ALERT#
6
THERM#
4
GND
5
D+
2
D-
3
SCLK
8
SDATA
7
R606
100_0402_1%
12
R151 200_0402_5%
1 2
C292 180P_0402_50V8J
1 2
R51
1K_0402_5%
1 2
LGA-775
(2/4)
JP21B
FOX_PE077507-0741-01
VCCP149
AJ21
VCCP150
AM11
VCCP151
AL11
VCCP152
AJ11
VCCP153
K30
VCCP154
AL14
VCCP155
AN30
VCCP156
AH25
VCCP157
AL12
VCCP158
AJ9
VCCP159
AK11
VCCP160
AG14
VCCP161
N29
VCCP162
AL30
VCCP163
AJ25
VCCP164
AH9
VCCP165
J29
VCCP166
J11
VCCP167
K25
VCCP168
P8
VCCP169
K23
VCCP170
AL19
VCCP171
AM8
VCCP172
T26
VCCP173
N28
VCCP174
AH12
VCCP175
AL22
VCCP176
AN15
VCCP177
AJ8
VCCP178
U26
VCCP179
AJ19
VCCP180
T27
VCCP181
AK8
VCCP182
AN12
VCCP183
AG9
VCCP184
N26
VCCP185
AF9
VCCP186
AF22
VCCP187
AH11
VCCP188
AJ14
VCCP189
AH19
VCCP190
AH29
VCCP191
AH27
VCCP192
AG28
VCCP193
AL26
VCCP194
AM12
VCCP195
J24
VCCP196
J13
VCCP197
T28
VCCP198
W28
VCCP199
J12
VCCP200
J27
VCCP201
AG19
VCCP202
AL9
VCCP203
AD30
VCCP204
AF21
VCCP205
Y24
VCCP206
AK14
VCCP207
J9
VCCP208
M27
VCCP209
AF14
VCCP210
J30
VCCP211
AG18
VCCP212
AA8
VCCP213
AG8
VCCP214
AL29
VCCP215
AD29
VCCP216
W8
VCCP217
AH8
VCCP218
N24
VCCP219
AN22
VCCP220
J14
VCCP221
K26
VCCP222
AF19
VCCP223
N8
VCCP224
AF12
VCCP225
M28
VCCP226
AK9
RS0#
B3
RS1#
F5
RS2#
A3
RSP#
H4
TRDY#
E3
A20M#
K3
FERR#/PBE#
R3
IGNNE#
N2
SMI#
P2
PWRGOOD
N1
STPCLK#
M3
LINT0
K1
LINT1
L1
INIT#
P3
RESET#
G23
DBSY#
B2
DRDY#
C1
BSEL0
G29
BSEL1
H30
BSEL2
G30
THERMDA
AL1
THERMDC
AK1
THERMTRIP#
M2
BPM0#
AJ2
BPM1#
AJ1
BPM2#
AD2
BPM3#
AG2
BPM4#
AF2
BPM5#
AG3
TCK
AE1
TDI
AD1
TDO
AF1
TMS
AC1
TRST#
AG1
VCCIOPLL
C23
VCCA
A23
VCCSENSE
AN3
VSSSENSE
AN4
VSSA
B23
ITP_CLK0
AK3
ITP_OUT1
AJ3
COMP0
A13
COMP1
T1
COMP2
G2
COMP3
R1
RSVD1
N4
RSVD2
P5
RSVD3
AC4
RSVD4
AE4
RSVD5
D23
RSVD6
AM5
VCC_MB_REGULATION
AN5
VSS_MB_REGULATION
AN6
RSVD9
F29
RSVD10
AK6
RSVD11
G6
RSVD12
AH2
RSVD13
N5
RSVD14
AE6
RSVD15
C9
RSVD16
G10
RSVD17
D16
RSVD18
A20
RSVD19
E23
RSVD20
E24
RSVD21
F23
RSVD22
H2
RSVD23
J2
RSVD24
J3
MS_ID1
V1
RSVD26
F6
RSVD27
T2
RSVD28
Y3
RSVD29
AE3
MS_ID0
W1
RSVD31
E7
RSVD32
B13
RSVD25
D14
RSVD30
E6
RSVD7
D1
RSVD8
E5
VTT1
A29
VTT2
B25
VTT3
B29
VTT4
B30
VTT5
C29
VTT6
A26
VTT7
B27
VTT8
C28
VTT9
A25
VTT10
A28
VTT11
A27
VTT12
C30
VTT13
A30
VTT14
C25
VTT15
C26
VTT16
C27
VTT17
B26
VTT18
D27
VTT19
D28
VTT20
D25
VTT21
D26
VTT22
B28
VTT23
D29
VTT24
D30
VTTPWRGD
AM6
VTT_OUT1
AA1
VTT_OUT2
J1
VTT_SEL
F27
VID0
AM2
VID1
AL5
VID2
AM3
VID3
AL6
VID4
AK4
VID5
AL4
PROCHOT#
AL2
MCERR#
AB3
SLP#
L2
DBR#
AC2
DBI0#
A8
DBI1#
G11
DBI2#
D19
DBI3#
C20
ADSTB0#
R6
ADSTB1#
AD5
DSTBP0#
B9
DSTBP1#
E12
DSTBP2#
G19
DSTBP3#
C17
DSTBN0#
C8
DSTBN1#
G12
DSTBN2#
G20
DSTBN3#
A16
TESTHI00
F26
TESTHI01
W3
TESTHI02
F25
TESTHI03
G25
TESTHI04
G27
TESTHI05
G26
TESTHI06
G24
TESTHI07
F24
TESTHI08
G3
TESTHI09
G4
TESTHI10
H5
TESTHI11
P1
TESTHI12
W2
SKTOCC#
AE8
GTLREF
H1
DP0#
J16
DP1#
H15
DP2#
H16
DP3#
J17
PCREQ#
G5
EDRDY#
F2
R590
@62_0402_5%
1 2
R184 100_0402_1%
1 2
C609
10U_0805_10V4Z
1
2
