AT32UC3CSeriesSummaryAT32UC3C2256C.pdf资源-CSDN文库

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### AT32UC3C系列微控制器特性概览 #### 高性能与低功耗的32位AVR®微控制器 AT32UC3C系列微控制器是基于高性能、低功耗32位AVR®架构设计的一款产品。该微控制器采用紧凑型单周期RISC指令集，支持DSP指令集，具有内置浮点处理单元（FPU），能够实现读取-修改-写入指令以及原子位操作，并具备每兆赫1.49 DMIPS的性能表现。 #### 性能参数 - 在从闪存运行时，最高可达到91 DMIPS（在66MHz时钟频率下，1个等待状态）。 - 在从闪存运行时，最高可达到49 DMIPS（在33MHz时钟频率下，0个等待状态）。 - 集成了内存保护单元，增强了系统的安全性。 #### 多层次总线系统该系列微控制器采用了多层次总线系统，能够在独立的总线上实现高性能的数据传输，从而提高了整体性能。此外，还提供了16个专用DMA通道，加快了外围设备之间的通信速度。 #### 内置高速闪存 - 支持不同容量版本：512K字节、256K字节、128K字节和64K字节。 - 单周期访问速度可达33MHz。 - 通过Flash Vault™技术为最终用户应用程序提供预编程的安全库支持。 - 配备预取缓冲器，优化在最大速度下的指令执行效率。 - 具有10万次写入循环能力，数据保持时间长达15年。 - 提供闪存安全锁和用户自定义配置区域。 #### 内置高速SRAM - 依据不同的闪存版本，分别提供64K字节（512K字节和256K字节闪存版本）、32K字节（128K字节闪存版本）和16K字节（64K字节闪存版本）的高速SRAM。 - 位于多层总线系统上的4K字节高速SRAM（HSBRAM）。 #### 外部内存接口 - AT32UC3C0系列微控制器提供外部内存接口。 - 支持SDRAM/SRAM兼容内存总线（16位数据总线和24位地址总线）。 #### 中断控制器 - 自动向量化的低延迟中断服务，支持可编程优先级设置。 #### 系统功能 - 电源和时钟管理模块。 - 内置115KHz (RCSYS) 和8MHz/1MHz (RC8M) RC振荡器。 - 一个32KHz和两个多用途振荡器。 - 支持时钟故障检测。 - 配备两个相位锁定环（PLL），使得CPU频率可以从USB或CAN频率中独立出来。 #### 窗口式看门狗定时器(WDT) - 该功能可以确保微控制器在发生异常时能够自动重启。 #### 异步定时器(AST)与实时钟能力 - 支持计数器模式和日历模式。 - 可用于实现实时钟功能。 #### 频率计(FREQM) - 用于精确测量时钟频率。 #### 以太网MAC 10/100Mbps接口 - 支持802.3标准的以太网媒体接入控制器。 - 支持媒体独立接口（MII）和简化MII（RMII）。 #### USB接口 - 支持USB 2.0设备和嵌入式主机低速及全速通信。 - 灵活的端点配置与管理，配备专用DMA通道。 - 集成收发器，包括上拉电阻。 #### CAN控制器 - 配备一个双通道控制器区域网络（CAN）。 - 支持CAN 2.0A和CAN 2.0B协议。 AT32UC3C系列微控制器不仅在性能方面表现出色，在内存管理、外部接口支持以及系统安全性等方面也具有显著优势，使其成为各种高性能嵌入式应用的理想选择。

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Features

• High Performance, Low Power 32-bit AVR

Microcontroller

– Compact Single-cycle RISC Instruction Set Including DSP Instruction Set

– Built-in Floating-Point Processing Unit (FPU)

– Read-Modify-Write Instructions and Atomic Bit Manipulation

– Performing 1.49 DMIPS / MHz

• Up to 91 DMIPS Running at 66 MHz from Flash (1 Wait-State)

• Up to 49 DMIPS Running at 33 MHz from Flash (0 Wait-State)

– Memory Protection Unit

• Multi-hierarchy Bus System

– High-Performance Data Transfers on Separate Buses for Increased Performance

– 16 Peripheral DMA Channels Improves Speed for Peripheral Communication

• Internal High-Speed Flash

– 512 Kbytes, 256 Kbytes, 128 Kbytes, 64 Kbytes Versions

– Single Cycle Access up to 33 MHz

–FlashVault

™

Technology Allows Pre-programmed Secure Library Support for End

User Applications

– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed

– 100,000 Write Cycles, 15-year Data Retention Capability

– Flash Security Locks and User Defined Configuration Area

• Internal High-Speed SRAM, Single-Cycle Access at Full Speed

– 64 Kbytes (512 KB and 256 KB Flash), 32 Kbytes (128 KB Flash), 16 Kbytes (64 KB

Flash)

– 4 Kbytes on the Multi-Layer Bus System (HSB RAM)

• External Memory Interface on AT32UC3C0 Derivatives

– SDRAM / SRAM Compatible Memory Bus (16-bit Data and 24-bit Address Buses)

• Interrupt Controller

– Autovectored Low Latency Interrupt Service with Programmable Priority

• System Functions

– Power and Clock Manager

– Internal 115KHz (RCSYS) and 8MHz/1MHz (RC8M) RC Oscillators

– One 32 KHz and Two Multipurpose Oscillators

– Clock Failure detection

– Two Phase-Lock-Loop (PLL) allowing Independent CPU Frequency from USB or

CAN Frequency

• Windowed Watchdog Timer (WDT)

• Asynchronous Timer (AST) with Real-Time Clock Capability

– Counter or Calendar Mode Supported

• Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency

• Ethernet MAC 10/100 Mbps interface

– 802.3 Ethernet Media Access Controller

– Supports Media Independent Interface (MII) and Reduced MII (RMII)

• Universal Serial Bus (USB)

– Device 2.0 and Embedded Host Low Speed and Full Speed

– Flexible End-Point Configuration and Management with Dedicated DMA Channels

– On-chip Transceivers Including Pull-Ups

• One 2-channel Controller Area Network (CAN)

– CAN2A and CAN2B protocol compliant, with high-level mailbox system

– Two independent channels, 16 Message Objects per Channel

32117D–AVR–01/12

32-bit AVR

Microcontroller

AT32UC3C0512C

AT32UC3C0256C

AT32UC3C0128C

AT32UC3C064C

AT32UC3C1512C

AT32UC3C1256C

AT32UC3C1128C

AT32UC3C164C

AT32UC3C2512C

AT32UC3C2256C

AT32UC3C2128C

AT32UC3C264C

32117D–AVR-01/12

AT32UC3C

1. Description

The AT32UC3C is a complete System-On-Chip microcontroller based on the AVR32UC RISC

processor running at frequencies up to 66 MHz. AVR32UC is a high-performance 32-bit RISC

microprocessor core, designed for cost-sensitive embedded applications, with particular empha-

sis on low power consumption, high code density and high performance.

The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt con-

troller for supporting modern operating systems and real-time operating systems. Using the

Secure Access Unit (SAU) together with the MPU provides the required security and integrity.

Higher computation capabilities are achievable either using a rich set of DSP instructions or

using the floating-point instructions.

The AT32UC3C incorporates on-chip Flash and SRAM memories for secure and fast access.

For applications requiring additional memory, an external memory interface is provided on

AT32UC3C0 derivatives.

The Memory Direct Memory Access controller (MDMA) enables transfers of block of data from

memories to memories without processor involvement.

The Peripheral Direct Memory Access (PDCA) controller enables data transfers between periph-

erals and memories without processor involvement. The PDCA drastically reduces processing

overhead when transferring continuous and large data streams.

The AT32UC3C incorporates on-chip Flash and SRAM memories for secure and fast access.

The FlashVault technology allows secure libraries to be programmed into the device. The secure

libraries can be executed while the CPU is in Secure State, but not read by non-secure software

in the device. The device can thus be shipped to end custumers, who are able to program their

own code into the device, accessing the secure libraries, without any risk of compromising the

proprietary secure code.

The Power Manager improves design flexibility and security. Power monitoring is supported by

on-chip Power-On Reset (POR), Brown-Out Detectors (BOD18, BOD33, BOD50). The CPU

runs from the on-chip RC oscillators, the PLLs, or the Multipurpose Oscillators. The Asynchro-

nous Timer (AST) combined with the 32 KHz oscillator keeps track of the time. The AST can

operate in counter or calendar mode.

The device includes six identical 16-bit Timer/Counter (TC) channels. Each channel can be inde-

pendently programmed to perform frequency measurement, event counting, interval

measurement, pulse generation, delay timing, and pulse width modulation.

The PWM module provides four channels with many configuration options including polarity,

edge alignment and waveform non overlap control. The PWM channels can operate indepen-

dently, with duty cycles set independently from each other, or in interlinked mode, with multiple

channels updated at the same time. It also includes safety feature with fault inputs and the ability

to lock the PWM configuration registers and the PWM pin assignment.

The AT32UC3C also features many communication interfaces for communication intensive

applications. In addition to standard serial interfaces like UART, SPI or TWI, other interfaces like

flexible CAN, USB and Ethernet MAC are available. The USART supports different communica-

tion modes, like SPI mode and LIN mode.

The Inter-IC Sound Controller (I2SC) provides a 5-bit wide, bidirectional, synchronous, digital

audio link with off-chip audio devices. The controller is compliant with the I2S bus specification.

32117D–AVR-01/12

AT32UC3C

The Full-Speed USB 2.0 Device interface supports several USB Classes at the same time

thanks to the rich End-Point configuration. The On-The-GO (OTG) Host interface allows device

like a USB Flash disk or a USB printer to be directly connected to the processor.

The media-independent interface (MII) and reduced MII (RMII) 10/100 Ethernet MAC module

provides on-chip solutions for network-connected devices.

The Peripheral Event Controller (PEVC) allows to redirect events from one peripheral or from

input pins to another peripheral. It can then trigger, in a deterministic time, an action inside a

peripheral without the need of CPU. For instance a PWM waveform can directly trigger an ADC

capture, hence avoiding delays due to software interrupt processing.

The AT32UC3C features analog functions like ADC, DAC, Analog comparators. The ADC inter-

face is built around a 12-bit pipelined ADC core and is able to control two independent 8-channel

or one 16-channel. The ADC block is able to measure two different voltages sampled at the

same time. The analog comparators can be paired to detect when the sensing voltage is within

or outside the defined reference window.

Atmel offers the QTouch library for embedding capacitive touch buttons, sliders, and wheels

functionality into AVR microcontrollers. The patented charge-transfer signal acquisition offers

robust sensing and included fully debounced reporting of touch keys and includes Adjacent Key

Suppression

(AKS

) technology for unambiguous detection of key events. The easy-to-use

QTouch Suite toolchain allows you to explore, develop, and debug your own touch applications.

AT32UC3C integrates a class 2+ Nexus 2.0 On-Chip Debug (OCD) System, with non-intrusive

real-time trace, full-speed read/write memory access in addition to basic runtime control. The

Nanotrace interface enables trace feature for aWire- or JTAG-based debuggers. The single-pin

aWire interface allows all features available through the JTAG interface to be accessed through

the RESET pin, allowing the JTAG pins to be used for GPIO or peripherals.

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