Lab 3
Adding Custom IP Lab: MicroBlaze
Adding Custom IP Lab: MicroBlaze
Introduction
This lab guides you through the process of adding a custom OPB peripheral to a processor
system by using the Import Peripheral Wizard.
Objectives
After completing this lab, you will be able to:
• Add a custom IP to your design
• Modify the UCF file to add pin location constraints
• Implement the design
• Test the design in hardware
Procedure
The purpose of this lab exercise is to complete the hardware design started in Lab 1 and
extended in Lab 2. Lab 1 included the MicroBlaze™ processor, mb_opb, debug_module, OPB
UART, two GPIOs, DLMB controller, ILMB controller, and LMB BRAM. Lab 2 added the
remaining IP, except for a GPIO instance for the 7-segment LEDs, to extend the hardware
design.
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In this lab, you will use the Import Peripheral Wizard of Xilinx Platform Studio (XPS) to create
a user peripheral from an HDL module, add an instance of the imported peripheral, and modify
the system.ucf file to provide an interface to the on-board 7-segment LED module.
MicroBlaze
LMB
BRAM
Cntlr
BRAM
LMB
BRAM
Cntlr
OPB
Bus
MY IP
7Seg
LED
PSB
UART
INTC
Timer
GPIO
GPIO
GPIO
LEDs
SWs
MDM
Figure 3-1. Completed Design
This lab comprises several steps involving the addition of a custom OPB peripheral. Although
the change to the hardware is simple, the lab illustrates the integration of a user peripheral
through the importing peripheral wizard. The lab also illustrates the use of an existing
peripheral to provide the OPB bus interface.
Below each general instruction for a given procedure, you will find accompanying step-by-step
directions and illustrated figures providing more detail for performing the general instruction. If
you feel confident about a specific instruction, feel free to skip the step-by-step directions and
move on to the next general instruction in the procedure.
Note: If you are unable to complete the lab at this time, you can download the lab files for this
module from the Xilinx University Program site at http://university.xilinx.com
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Opening the Project Step 1
Create a lab3mb folder under c:\tmp\embedded\labs\. If you wish to continue
with your completed design from lab2 then copy the contents of the lab2mb
folder into the lab3mb folder, otherwise, if you wish to start with a known good
design, then copy the contents of c:\tmp\embedded\mb_completed\lab2mb
into the lab3mb folder. Launch Xilinx Platform Studio (XPS) and open the
project file located in c:\tmp\embedded\labs\lab3mb.
Create a lab3mb folder in the c:\tmp\embedded\labs directory. If you wish to continue
with your completed design from lab2 then copy the contents of the lab2mb folder into the
lab3mb folder, otherwise, if you wish to start with a known good design, then copy the
contents of c:\tmp\embedded\mb_completed\lab2mb into the lab3mb directory.
Open XPS by clicking Start → Programs → Xilinx Platform Studio 6.3i → Xilinx
Platform Studio
Click File → Open Project and browse to the project which in the directory:
c:\tmp\embedded\labs\lab3mb
Select system.xmp in the lab3mb directory to open the project
Creating a Custom OPB Peripheral using Wizard Step 2
Use Tools → Create - Import Peripheral Wizard to create a custom OPB
peripheral.
Click Tools → Create/Import Peripheral Wizard in XPS
The Introduction screen for the Create - Import Peripheral Wizard will appear (Figure
3-2)
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Figure 3-2. Create and Import Peripheral Wizard Introduction Screen
Click Next and the Create and Import Peripheral Wizard’s flow selection will appear
This wizard will help you create templates for a new EDK compliant peripheral or help you
import an existing peripheral into an XPS project or EDK repository. For this project we
will create an EDK-compliant peripheral.
Figure 2-3. Create/Import User Peripheral Screen
The default selection is Create template for a new peripheral. Ensure the radio button is
on for this selection, Click Next and the Create and Import Peripheral Wizard’s target
selection will appear
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