Lab 2
Adding IP to a Hardware
Design Lab: MicroBlaze
Adding IP to a Hardware Design Lab: MicroBlaze
Introduction
This lab guides you through the process of adding additional IP (hardware functions) to an
existing processor system by using Xilinx Platform Studio (XPS). You will learn two methods of
adding additional IP: using the Add/Edit core through a dialog box and modifying an MHS file by
using a text editor. At the end, an MHS file will be modified and design netlists will be created.
The design will be implemented by using the ISE flow.
Objectives
After completing this lab, you will be able to:
• Add additional IP to a hardware design
• Implement the design by utilizing ISE
SetUp
For this lab, you will need a Xilinx Spartan3 Starter Board and a serial cable.
• Connect the included programming cable to the PC parallel port and the Spartan3 Board.
• The board connector is not keyed, so be sure to match the text printed on the connector
and the silk screen printed on the board.
• Connect a serial cable between the PC and the DB-9 connector on the board.
• A serial cable is not included in the kit. A straight thru cable is needed with connections
at least on pins 2, 3, and 5.
• Attach the included power supply to the board.
Adding IP to a Hardware Design Lab: http://university.xilinx.com 5c-2
MicroBlaze xup@xilinx.com
Figure 2-1. Board Setup
Adding IP to a Hardware Design Lab: http://university.xilinx.com 5c-3
MicroBlaze xup@xilinx.com
Procedure
The purpose of this lab exercise is to extend the hardware design started in Lab 1. Lab 1 included
the MicroBlaze, mb_opb, debug_module, UART, two GPIOs, DLMB controller, ILMB
controller, and LMB BRAM components. Lab 2 will add the remaining components, except for a
MYIP instance for the LCD, to extend the hardware design.
In this lab, you will use the system dialog mode of XPS and the text mode features to add the
following IP to an existing processor system:
• OPB timer and counter for time delay
• OPB GPIO DIP switches
You will also analyze the system.mhs file and understand the various sections of the hardware
specifications of the microprocessor.
MicroBlaze
LMB
BRAM
Cntlr
BRAM
LMB
BRAM
Cntlr
OPB
Bus
MY IP
7Seg
LED
PSB
UART
INTC
Timer
GPIO
GPIO
GPIO
LEDs
SWs
MDM
Figure 2-2. Completed Design
This lab comprises several steps, including adding IP to the processor system designed in lab1,
and creating an ISE Project used to implement the design. Below each general instruction for a
given procedure, you will find accompanying step-by-step directions and illustrated figures
providing more detail for performing the general instruction. If you feel confident about a specific
instruction, feel free to skip the step-by-step directions and move on to the next general instruction
in the procedure.
Adding IP to a Hardware Design Lab: http://university.xilinx.com 5c-4
MicroBlaze xup@xilinx.com
Note: If you are unable to complete the lab at this time, you can download the lab files for this
module from the Xilinx University Program site at http://university.xilinx.com
Adding IP to a Hardware Design Lab: http://university.xilinx.com 5c-5
MicroBlaze xup@xilinx.com
