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外文翻译--AT89S52单片机.doc
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外文翻译--AT89S52单片机
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AT89S52
Description
The AT89s52 is a low-power, high-performance CMOS 8-bit microcomputer with
8K bytes of Flash programmable and erasable read only memory(PEROM). The device
is manufactured using Atmel’s high-density nonvolatile memory technology and is
compatible with the industry-standard 80C51 and 80C52 instruction set and pinout. The
on-chip Flash allows the program memory to be reprogrammed in-system or by a
conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU
with Flash on a monolithic chip, the Atmel AT89s52 is a powerful microcomputer
which provides a highly-flexible and cost-effective solution to many embedded control
applications.
Pin Configurations: The AT89s52 provides the following standard features: 8K
bytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16-bittimer/counters, a six-vector
two-level interrupt architecture, a full-duplex serial port, on-chip oscillator, and clock
circuitry. In addition, the AT89s52 is designed with static logic for operation down to
zero frequency and supports two software selectable power saving modes. The Idle
Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt
system to continue functioning. The Power-down mode saves the RAM contents but
freezes the oscillator, disabling all other chip functions until the next hardware reset.
Pin Description
·VCC: Supply voltage.
·GND: Ground.
·Port 0: Port 0 is an 8-bit open drain bi-directional I/O port. As an output port,
each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be
used as highimpedance inputs.
Port 0 can also be configured to be the multiplexed loworder address/data bus
during accesses to external program and data memory. In this mode, P0 has
internalpullups.
Port 0 also receives the code bytes during Flash programming and outputs the code
bytes during program verification. External pullups are required during program
verification.
·Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1
output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they
are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins
that are externally being pulled low will source current (
I
IL
)because of the internal
pullups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external
count input(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as
shown in the following table.
Port 1 also receives the low-order address bytes during Flash programming and
verification.
Port Pin
Alternate Function
P1.0
T2(external count input to Timer/Counter2),
clock-out
P1.1
T2EX(Time/Counter2 capture/reload trigger
and direction control)
·Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2
output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they
are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins
that are externally being pulled low will source current (
I
IL
)because of the internal
pullups.
Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that use 16-bit addresses (MOVX
@DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s.
During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2
emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during
Flash programming and verification.
·Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3
output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they
are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins
that are externally being pulled low will source current (
I
IL
) because of the pullups.
Port 3 also serves the functions of various special features of the AT89C51, as
shown in the following table.
Port 3 also receives some control signals for Flash programming and verification.
Port Pin
Alternate Function
P3.0
RXD (serial input port)
P3.1
TXD(serial output port)
P3.2
external interrupt 0
P3.3
external interrupt 1
P3.4
T0(timer 0 external input)
P3.5
T1(timer 1 external input)
P3.6
external data memory write strobe
P3.7
external data memory read strobe
·RST: Reset input. A high on this pin for two machine cycles while the oscillator
is running resets the device.
·ALE/
PROG
: Address Latch Enable is an output pulse for latching the low byte of
the address during accesses to external memory. This pin is also the program pulse input
(
PROG
) during Flash programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however,
that one ALE pulse is skipped during each access to external data memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH.
With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise,
the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the
microcontroller is in external execution mode.
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