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外文翻译---采用高性能的静态80C51设计的单片机.docx
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2022-07-08
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外文翻译---采用高性能的静态80C51设计的单片机
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附录 III 外文资料
英文文献
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with
4K bytes of Flash programmable and erasable read only memory (PEROM). The
device is manufactured using Atmel’s high-density nonvolatile memory technology
and is compatible with the industry-standard MCS-51 instruction set and pinout. The
on-chip Flash allows the program memory to be reprogrammed insystem or by a
conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU
with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer
which provides a highlyflexible and cost-effective solution to many embedded control
applications.
Features
* Compatible with MCS-51 Products
* 4K Bytes of In-System Reprogrammable Flash Memory
– Endurance: 1,000 Write/Erase Cycles
* Fully Static Operation: 0 Hz to 24 MHz
* Three-level Program Memory Lock
* 128 x 8-bit Internal RAM
* 32 Programmable I/O Lines
* Two 16-bit Timer/Counters
* Six Interrupt Sources
* Programmable Serial Channel
* Low-power Idle and Power-down Modes
The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes
of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt
architecture,a full duplex serial port, on-chip oscillator and clock cir-cuitry. In
addition, the AT89C51 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters,serial port and interrupt
system to continue functioning. The Power-down Mode saves the RAM contents but
freezes the oscillator disabling all other chip functions until the next hardware reset.
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can
sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as
high-impedance inputs.
Port 0 may also be configured to be the multiplexed loworder address/data bus during
accesses to external program and data memory. In this mode P0 has internal pullups.
Port 0 also receives the code bytes during Flash program-
ming, and outputs the code bytes during program verification. External pullups are
required during program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output
buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are
pulled high by the internal pullups and can be used as inputs. As inputs,
Port 1 pins that are externally being pulled low will source current (I ) because of the
internal pullups.
Port 1 also receives the low-order address bytes during Flash programming and
verification.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output
buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are
pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins
that are externally being pulled low will source current (I ) because of the internal
pullups.
Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that use 16-bit addresses
(MOVX @DPTR). In this application, it uses strong internal pullups when emitting 1s.
During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port
2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash
programming and verification.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output
buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are
pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins
that are externally being pulled low will source current (I ) because of the pullups.
Port 3 also serves the functions of various special features
of the AT89C51 as listed below:
Port Pin Alternate Functions
P3.0 RXD (serial input port)
P3.1 TXD (serial output port)
P3.2 INT0 (external interrupt 0)
P3.3 INT1 (external interrupt 1)
P3.4 T0 (timer 0 external input)
P3.5 T1 (timer 1 external input)
P3.6 WR (external data memory write strobe)
P3.7 RD (external data memory read strobe)
Port 3 also receives some control signals for Flash pro-
gramming and verification.
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during
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