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This annex describes the serial presence detect (SPD) values for all DDR5 memory modules. To allow for maximum flexibility as devices evolve, SPD fields described in this document may support device configuration and timing options that are not included in the JEDEC DDR5 SDRAM data sheet (JESD79-5). Please refer to DRAM supplier data sheets or JESD79-5 to determine the compatibility of components.
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COMMITTEE LETTER BALLOT
Solid State Technology Association
3103 North 10th Street
Arlington, Virginia 22201
TEL: (703) 907-7560
Ballot Template Version draft rev. 8/11
© JEDEC 2011
JEDEC CONFIDENTIAL
COMMITTEE: JC-45
ITEM NUMBER: JC-45-2260.01H
DATE: 2020-tbd
SUBJECT: Proposed JESD400-5 DDR5 Serial Presence Detect (SPD) Contents
BACKGROUND: Developed by the SPD Task Group.
KEYWORDS: DDR5 Serial Presence Detect SPD
SPONSOR: ORIGINATOR:
Bill Gervasi
Nantero
bilge@nantero.com
Bill Gervasi
Nantero
bilge@nantero.com
JEDEC
STANDARD
DDR5 Serial Presence Detect (SPD)
Contents
JESD400-5
Revision 0.93
April 2020
JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
DDR5 Serial Presence Detect (SPD) Contents Item JC-45-2260.01H
Page 2 of 4
P R O P O S E D
Printed in the U.S.A.
All rights reserved
NOTICE
JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the
JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel.
JEDEC standards and publications are designed to serve the public interest through eliminating
misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of
products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by
those other than JEDEC members, whether the standard is to be used either domestically or internationally.
JEDEC standards and publications are adopted without regard to whether or not their adoption may involve
patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent
owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications.
The information included in JEDEC standards and publications represents a sound approach to product
specification and application, principally from the solid state device manufacturer viewpoint. Within the
JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed
and ultimately become an ANSI standard.
No claims to be in conformance with this standard may be made unless all requirements stated in the standard
are met.
Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be
addressed to JEDEC at the address below, or refer to www.jedec.org
under Standards and Documents for
alternative contact information.
Published by
©JEDEC Solid State Technology Association 2016 3103
North 10th Street
Suite 240 South
Arlington, VA 22201-2107
This document may be downloaded free of charge; however JEDEC retains the copyright on
this material. By downloading this file the individual agrees not to charge for or resell the
resulting material.
PRICE: Contact JEDEC
Page 3 of 4
DDR5 Serial Presence Detect (SPD) Contents Item JC-45-2260.01H
P R O P O S E D
PLEASE!
DON’T VIOLATE
THE
LAW!
This document is copyrighted by JEDEC and may not be reproduced
without permission.
For information, contact:
JEDEC Solid State Technology Association 3103
North 10th Street
Suite 240 South
Arlington, VA 22201-2107
or refer to www.jedec.org under Standards-Documents/Copyright Information.
DDR5 Serial Presence Detect (SPD) Contents Item JC-45-2260.01H
Page 4 of 4
P R O P O S E D
REVISION HISTORY
Revision Author Date Status and Description
Rev0.1 B.Gervasi
05/25/
17
DDR5 Initial Format Rev0.1, Changed all timing values to 16-
bit values with fixed time-
base, Removed references to LPDDR5
Rev0.7 C.Cox 2/28/18
Update to file, moved to book format. Removed DRAM parametric values that were
sta
tic in the DRAM specification. With the adoption of 1024B SPD size, content locations
and areas were move to allow co-location of block regions. Since the module definitions
are still not solidified in the module TG, the Module Appendix are being moved to
independent files in the books system, allowing them to be balloted later as their specs
are defined. The full draft spec will not be published until at least the first draft of the core
appendixes are completed (UDIMM, RDIMM, LRDIMM and likely NVDIMM).
Rev 0.8 B. Gervasi
10/30/
18
Moved all examples to a separate page derived from the
master spreadsheet. Added
bytes for VDD, VDDQ, VPP. Deleted tRCD, tCCD, tFAW. Assert that NVDIMM will be its
own module type instead of overlay as in DDR4. Expanded Manufacturing Part Number
to 30 bytes.
Rev 0.8
ballot com-
ments
B. Gervasi 11/8/18
Added RFU blocks and renumbered all bytes accor
dingly. Repaired many errors in mod-
ule annexes.
Rev 0.81 B. Gervasi 2/21/19 Added PMIC bytes to all annexes
Rev 0.82 B. Gervasi 4/9/19 Corrected per ballot comments: pointer
to revision byte, module thickness
Rev 0.86 B. Gervasi
10/28/
19
Moved thermal byte to DIMM common annex
Cleaned up symmetrical/asymmetrical DIMM diagr
ams
Added module calculation
Removed duplicated I/O width parameter
Added temperature grades per JESD402-1
Corrected typo in byte 6, 8
Rev 0.87 B. Gervasi
10/29/
19
Removed redundant wording, cleaned up capacity calculation to match byte content
names
Rev 0.88 B. Gervasi
10/29/
19
Corrected thermal byte typo
Renamed Primary and Secondary SDRAMs as First and Second
Cleaned up color coding in examples section
Rev 0.89 B. Gervasi 1/20/20
Removed DDP
Cleaned up first/second DRAM references
Rev 0.90 B. Gervasi 1/21/20 Changed rounding algorithm to match JC42.3
Rev 0.90a B. Gervasi 1/27/20
Changed coding for die per package for
consistency to old coding
Updated examples per new spreadsheet
Rev 0.90b B. Gervasi 1/28/20
Reconciled UDIMM and RDIMM module types between byte 3, base co
nfiguration, and
annexes, corrected some copy and paste errors in timing examples section
Rev 0.91 B. Gervasi 3/9/20 Fixed numbering of row and column encodings, bytes 5 and 9
Rev 0.92 B. Gervasi 3/17/20 Updated all examples per spreadsheet 3/11/20
Rev 0.92 B. Gervasi 4/27/20 Single CRC for blocks 0-7
Rev. 0.93 B. Gervasi 4/29/20 Changed SO-DIMM to SODIMM, 72b- to ECC
Document Formating Legend
Colors used in this Document and what they mean:
RED - All Red text is defined as something that is NEW
BLACK - Is considered the standard or the current Ballot.
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