/** @file esm.c
* @brief Esm Driver Source File
* @date 04.October.2011
* @version 1.02.000
*
* This file contains:
* - API Funcions
* .
* which are relevant for the Esm driver.
*/
/* (c) Texas Instruments 2009-2011, All rights reserved. */
/* USER CODE BEGIN (0) */
/* USER CODE END */
/* Include Files */
#include "sys_esm.h"
/* USER CODE BEGIN (1) */
/* USER CODE END */
/** @fn void esmInit(void)
* @brief Initializes Esm Driver
*
* This function initializes the Esm driver.
*
*/
/* USER CODE BEGIN (2) */
/* USER CODE END */
void esmInit(void)
{
/* USER CODE BEGIN (3) */
/* USER CODE END */
/** - Disable error pin channels */
esmREG->EPENACLR1 = 0xFFFFFFFFU;
esmREG->EPENACLR4 = 0xFFFFFFFFU;
/** - Disable interrupts */
esmREG->INTENACLR1 = 0xFFFFFFFFU;
esmREG->INTENACLR4 = 0xFFFFFFFFU;
/** - Clear error status flags */
esmREG->ESTATUS1[0U] = 0xFFFFFFFFU;
esmREG->ESTATUS1[1U] = 0xFFFFFFFFU;
esmREG->ESTATUS2EMU = 0xFFFFFFFFU;
esmREG->ESTATUS1[2U] = 0xFFFFFFFFU;
esmREG->ESTATUS4[0U] = 0xFFFFFFFFU;
esmREG->ESTATUS4[1U] = 0xFFFFFFFFU;
esmREG->ESTATUS5EMU = 0xFFFFFFFFU;
esmREG->ESTATUS4[2U] = 0xFFFFFFFFU;
/** - Setup LPC preload */
esmREG->LTCPRELOAD = 16384U - 1U;
/** - Reset error pin */
if (esmREG->EPSTATUS == 0U)
{
esmREG->KEY = 0x00000005U;
}
else
{
esmREG->KEY = 0x00000000U;
}
/** - Clear interrupt level */
esmREG->INTLVLCLR1 = 0xFFFFFFFFU;
esmREG->INTLVLCLR4 = 0xFFFFFFFFU;
/** - Set interrupt level */
esmREG->INTLVLSET1 = (0U << 31U)
| (0U << 30U)
| (0U << 29U)
| (0U << 28U)
| (0U << 27U)
| (0U << 26U)
| (0U << 25U)
| (0U << 24U)
| (0U << 23U)
| (0U << 22U)
| (0U << 21U)
| (0U << 20U)
| (0U << 19U)
| (0U << 18U)
| (0U << 17U)
| (0U << 16U)
| (0U << 15U)
| (0U << 14U)
| (0U << 13U)
| (0U << 12U)
| (0U << 11U)
| (0U << 10U)
| (0U << 9U)
| (0U << 8U)
| (0U << 7U)
| (0U << 6U)
| (0U << 5U)
| (0U << 4U)
| (0U << 3U)
| (0U << 2U)
| (0U << 1U)
| (0U);
esmREG->INTLVLSET4 = (0U << 31U)
| (0U << 30U)
| (0U << 29U)
| (0U << 28U)
| (0U << 27U)
| (0U << 26U)
| (0U << 25U)
| (0U << 24U)
| (0U << 23U)
| (0U << 22U)
| (0U << 21U)
| (0U << 20U)
| (0U << 19U)
| (0U << 18U)
| (0U << 17U)
| (0U << 16U)
| (0U << 15U)
| (0U << 14U)
| (0U << 13U)
| (0U << 12U)
| (0U << 11U)
| (0U << 10U)
| (0U << 9U)
| (0U << 8U)
| (0U << 7U)
| (0U << 6U)
| (0U << 5U)
| (0U << 4U)
| (0U << 3U)
| (0U << 2U)
| (0U << 1U)
| (0U);
/** - Enable error pin channels */
esmREG->EPENASET1 = (0U << 31U)
| (0U << 30U)
| (0U << 29U)
| (0U << 28U)
| (0U << 27U)
| (0U << 26U)
| (0U << 25U)
| (0U << 24U)
| (0U << 23U)
| (0U << 22U)
| (0U << 21U)
| (0U << 20U)
| (0U << 19U)
| (0U << 18U)
| (0U << 17U)
| (0U << 16U)
| (0U << 15U)
| (0U << 14U)
| (0U << 13U)
| (0U << 12U)
| (0U << 11U)
| (0U << 10U)
| (0U << 9U)
| (0U << 8U)
| (0U << 7U)
| (0U << 6U)
| (0U << 5U)
| (0U << 4U)
| (0U << 3U)
| (0U << 2U)
| (0U << 1U)
| (0U);
esmREG->EPENASET4 = (0U << 31U)
| (0U << 30U)
| (0U << 29U)
| (0U << 28U)
| (0U << 27U)
| (0U << 26U)
| (0U << 25U)
| (0U << 24U)
| (0U << 23U)
| (0U << 22U)
| (0U << 21U)
| (0U << 20U)
| (0U << 19U)
| (0U << 18U)
| (0U << 17U)
| (0U << 16U)
| (0U << 15U)
| (0U << 14U)
| (0U << 13U)
| (0U << 12U)
| (0U << 11U)
| (0U << 10U)
| (0U << 9U)
| (0U << 8U)
| (0U << 7U)
| (0U << 6U)
| (0U << 5U)
| (0U << 4U)
| (0U << 3U)
| (0U << 2U)
| (0U << 1U)
| (0U);
/** - Enable interrpts */
esmREG->INTENASET1 = (0U << 31U)
| (0U << 30U)
| (0U << 29U)
| (0U << 28U)
| (0U << 27U)
| (0U << 26U)
| (0U << 25U)
| (0U << 24U)
| (0U << 23U)
| (0U << 22U)
| (0U << 21U)
| (0U << 20U)
| (0U << 19U)
| (0U << 18U)
| (0U << 17U)
| (0U << 16U)
| (0U << 15U)
| (0U << 14U)
| (0U << 13U)
| (0U << 12U)
| (0U << 11U)
| (0U << 10U)
| (0U << 9U)
| (0U << 8U)
| (0U << 7U)
| (0U << 6U)
| (0U << 5U)
| (0U << 4U)
| (0U << 3U)
| (0U << 2U)
| (0U << 1U)
| (0U);
esmREG->INTENASET4 = (0U << 31U)
| (0U << 30U)
| (0U << 29U)
| (0U << 28U)
| (0U << 27U)
| (0U << 26U)
| (0U << 25U)