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FlexRay Communications System
Protocol Specification
Version 3.0.1
FlexRay Protocol Specification
Version 3.0.1 October 2010
Disclaimer
Page 2 of 341
Disclaimer
This specification and the material contained in it, as released by the FlexRay Consortium, is for the purpose
of information only. The FlexRay Consortium and the companies that have contributed to it shall not be liable
for any use of the specification.
The material contained in this specification is protected by copyright and other types of Intellectual Property
Rights. The commercial exploitation of the material contained in this specification requires a license to such
Intellectual Property Rights.
This specification may be utilized or reproduced without any modification, in any form or by any means, for
informational purposes only.
For any other purpose, no part of the specification may be utilized or reproduced, in any form or by any
means, without permission in writing from the publisher.
Important Information
1. The FlexRay™ specifications V2.1 and V3.0.1 and the corresponding FlexRay™
Conformance Test specifications (hereinafter together "FlexRay™ specifications")
have been developed for automotive applications only. They have neither been
developed nor tested for non-automotive applications.
2. The FlexRay™ specifications are retrievable on the FlexRay Website
www.flexray.com for information purposes only and without obligation.
3. The technical expertise provided in the FlexRay™ specifications is subject to continu-
ous further development. The FlexRay™ specifications serve exclusively as an infor-
mation source to enable to manufacture and test products which comply with the
FlexRay™ specifications ("FlexRay™ compliant products"). Observation of the
FlexRay™ specifications does neither guarantee the operability and safety of the
FlexRay™ compliant products, nor does it guarantee the safe cooperation of multiple
FlexRay™ compliant products with each other or with other products. Therefore, the
members of the former FlexRay™ Consortium are not able to assume liability for the
operability and safety of such products and the safe cooperation of multiple
FlexRay™ compliant products with each other or with other products.
4. The FlexRay™ specifications V3.0.1 were submitted to ISO in order to be published
as a standard for road vehicles.
The word FlexRay and the FlexRay logo are registered trademarks.
Copyright © 2006 - 2010. All rights reserved.
The Core Partners of the FlexRay Consortium are Adam Opel GmbH, Bayerische Motoren Werke AG,
Daimler AG, Freescale Halbleiter Deutschland GmbH, NXP B.V., Robert Bosch GmbH, and Volkswagen AG.
FlexRay Protocol Specification
Version 3.0.1 October 2010
Table of Contents
Page 3 of 341
Table of Contents
Disclaimer..............................................................................................................................................2
Chapter 1
Introduction.............................................................................................................. 12
1.1 Scope .............................................................................................................................................12
1.2 References .....................................................................................................................................12
1.2.1 FlexRay consortium documents ........................................................................................... 12
1.2.2 Non-consortium documents.................................................................................................. 12
1.3 Revision history ..............................................................................................................................13
1.4 Terms and definitions .....................................................................................................................16
1.5 Acronyms and abbreviations ..........................................................................................................22
1.6 Notational conventions ...................................................................................................................24
1.6.1 Parameter prefix conventions............................................................................................... 24
1.6.2 Color coding ......................................................................................................................... 25
1.6.3 Implementation dependent behavior .................................................................................... 25
1.7 SDL conventions ............................................................................................................................25
1.7.1 General................................................................................................................................. 25
1.7.2 SDL notational conventions.................................................................................................. 26
1.7.3 SDL extensions .................................................................................................................... 26
1.7.3.1 Microtick, macrotick and sample tick timers ................................................................. 26
1.7.3.2 Microtick behavior of the 'now' - expression ................................................................. 27
1.7.3.3 Channel-specific process replication ............................................................................ 27
1.7.3.4 Handling of priority input symbols................................................................................. 27
1.7.3.5 Signals to non-instantiated processes.......................................................................... 28
1.7.3.6 Exported and imported signals ..................................................................................... 28
1.8 Bit rates ..........................................................................................................................................28
1.9 Roles of a node in a FlexRay cluster..............................................................................................28
1.10 Synchronization methods .............................................................................................................29
1.10.1 TT-D synchronization method ............................................................................................ 29
1.10.2 TT-L synchronization method ............................................................................................. 29
1.10.3 TT-E synchronization method............................................................................................. 30
1.11 Network topology considerations..................................................................................................32
1.11.1 Passive bus topology.......................................................................................................... 33
1.11.2 Active star topology ............................................................................................................ 33
1.11.3 Active star topology combined with a passive bus topology............................................... 35
1.12 Example node architecture...........................................................................................................37
1.12.1 Objective............................................................................................................................. 37
1.12.2 Overview............................................................................................................................. 37
1.12.3 Host - communication controller interface .......................................................................... 37
1.12.4 Communication controller - bus driver interface ................................................................. 38
1.12.5 Bus driver - host interface................................................................................................... 39
1.12.5.1 Hard wired signals (option A) ..................................................................................... 39
1.12.5.2 Serial peripheral interface (SPI) (option B)................................................................. 39
1.12.6 Bus driver - power supply interface (optional) .................................................................... 40
1.12.7 Time gateway interface ...................................................................................................... 40
1.13 Testability requirements ...............................................................................................................40
Chapter 2
Protocol Operation Control .................................................................................... 41
FlexRay Protocol Specification
Version 3.0.1 October 2010
Table of Contents
Page 4 of 341
2.1 Principles ........................................................................................................................................41
2.1.1 Communication controller power moding ............................................................................. 41
2.2 Description......................................................................................................................................42
2.2.1 Operational overview............................................................................................................ 43
2.2.1.1 Host commands............................................................................................................ 44
2.2.1.2 Error conditions ............................................................................................................ 45
2.2.1.2.1 Errors causing immediate entry to the POC:halt state ..........................................45
2.2.1.2.2 Errors handled by the degradation model .............................................................45
2.2.1.3 POC status ................................................................................................................... 46
2.2.1.4 SDL considerations for single channel nodes .............................................................. 47
2.3 The protocol operation control process ..........................................................................................48
2.3.1 POC SDL utilities.................................................................................................................. 48
2.3.2 SDL organization .................................................................................................................. 50
2.3.3 Preempting commands......................................................................................................... 50
2.3.4 Deferred commands............................................................................................................. 51
2.3.4.1 DEFERRED_HALT, DEFERRED_READY and CLEAR_DEFERRED commands ...... 51
2.3.4.2 ALL_SLOTS command................................................................................................. 54
2.3.5 Reaching the POC:ready state............................................................................................. 54
2.3.5.1 Default configuration requirements............................................................................... 56
2.3.6 Reaching the POC:normal active state ................................................................................ 57
2.3.6.1 Wakeup and startup support ........................................................................................ 58
2.3.7 Behavior during normal operation ........................................................................................ 60
2.3.7.1 Cyclical behavior .......................................................................................................... 60
2.3.7.1.1 Cycle counter.........................................................................................................60
2.3.7.1.2 POC:normal active state........................................................................................60
2.3.7.1.3 POC:normal passive state.....................................................................................62
2.3.7.1.4 Error checking during normal operation ................................................................64
2.3.7.1.4.1 Error checking overview ................................................................................65
2.3.7.1.4.2 Error checking details for the POC:normal active state.................................65
2.3.7.1.4.3 Error checking details for the POC:normal passive state ..............................66
Chapter 3
Coding and Decoding ............................................................................................. 69
3.1 Principles ........................................................................................................................................69
3.2 Description......................................................................................................................................69
3.2.1 Frame and symbol encoding ................................................................................................ 70
3.2.1.1 Frame encoding............................................................................................................ 70
3.2.1.1.1 Transmission start sequence.................................................................................70
3.2.1.1.2 Frame start sequence............................................................................................71
3.2.1.1.3 Byte start sequence...............................................................................................71
3.2.1.1.4 Frame end sequence.............................................................................................71
3.2.1.1.5 Dynamic trailing sequence ....................................................................................71
3.2.1.1.6 Frame bit stream assembly ...................................................................................72
3.2.1.2 Symbol encoding .......................................................................................................... 73
3.2.1.2.1 Collision avoidance symbol and media access test symbol ..................................73
3.2.1.2.2 Wakeup symbol.....................................................................................................74
3.2.1.2.3 Wakeup During Operation Pattern (WUDOP) .......................................................77
3.2.2 Sampling and majority voting ............................................................................................... 77
3.2.3 Bit clock alignment and bit strobing...................................................................................... 78
3.2.4 Implementation specific delays............................................................................................. 79
3.2.5 Channel idle detection.......................................................................................................... 80
3.2.6 Action point and time reference point ................................................................................... 80
3.2.7 Frame and symbol decoding ................................................................................................ 82
FlexRay Protocol Specification
Version 3.0.1 October 2010
Table of Contents
Page 5 of 341
3.2.7.1 Frame decoding............................................................................................................ 83
3.2.7.2 Symbol decoding .......................................................................................................... 84
3.2.7.2.1 Collision avoidance symbol and media access test symbol decoding ..................84
3.2.7.2.2 Wakeup symbol decoding .....................................................................................84
3.2.7.3 Decoding error.............................................................................................................. 85
3.2.8 Signal integrity...................................................................................................................... 86
3.3 Coding and decoding process ........................................................................................................86
3.3.1 Operating modes.................................................................................................................. 86
3.3.2 Coding and decoding process behavior ............................................................................... 86
3.3.3 Encoding behavior................................................................................................................ 88
3.3.4 Encoding macros.................................................................................................................. 91
3.3.5 Decoding behavior................................................................................................................ 96
3.3.6 Decoding macros.................................................................................................................. 97
3.4 Bit strobing process ......................................................................................................................104
3.4.1 Operating modes................................................................................................................ 104
3.4.2 Bit strobing process behavior ............................................................................................. 105
3.5 Wakeup pattern decoding process...............................................................................................107
3.5.1 Operating modes................................................................................................................ 107
3.5.2 Wakeup pattern decoding process behavior ...................................................................... 108
Chapter 4
Frame Format......................................................................................................... 111
4.1 Overview.......................................................................................................................................111
4.2 FlexRay header segment (5 bytes) ..............................................................................................111
4.2.1 Reserved bit (1 bit) ............................................................................................................. 111
4.2.2 Payload preamble indicator (1 bit)...................................................................................... 112
4.2.3 Null frame indicator (1 bit) .................................................................................................. 112
4.2.4 Sync frame indicator (1 bit)................................................................................................. 112
4.2.5 Startup frame indicator (1 bit)............................................................................................. 113
4.2.6 Frame ID (11 bits)............................................................................................................... 113
4.2.7 Payload length (7 bits)........................................................................................................ 114
4.2.8 Header CRC (11 bits)......................................................................................................... 114
4.2.9 Cycle count (6 bits)............................................................................................................. 115
4.2.10 Formal header definition................................................................................................... 115
4.3 FlexRay payload segment (0 - 254 bytes)....................................................................................115
4.3.1 NMVector............................................................................................................................ 116
4.3.2 Message ID (16 bits) .......................................................................................................... 117
4.4 FlexRay trailer segment................................................................................................................117
4.5 CRC calculation details ................................................................................................................118
4.5.1 CRC calculation algorithm .................................................................................................. 118
4.5.2 Header CRC calculation ..................................................................................................... 119
4.5.3 Frame CRC calculation ...................................................................................................... 119
Chapter 5
Media Access Control........................................................................................... 121
5.1 Principles ......................................................................................................................................121
5.1.1 Communication cycle ......................................................................................................... 121
5.1.2 Communication cycle execution ......................................................................................... 122
5.1.3 Static segment.................................................................................................................... 123
5.1.3.1 Structure of the static segment................................................................................... 123
5.1.3.2 Execution and timing of the static segment ................................................................ 123
5.1.4 Dynamic segment............................................................................................................... 124
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