【免费】STM32FEBKC6T6数据手册电机控制可替代STM32F103C6T6_stm32febkc6t6的下载程序怎么写资源-CSDN文库

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### STM32FEBKC6T6 数据手册：电机控制应用及特性详解 #### 核心功能概述 STM32FEBKC6T6是一款基于ARM Cortex-M3内核的高性能32位微控制器（MCU），专为满足工业级应用的需求而设计，特别是对于电机控制领域而言，它提供了丰富的外设接口和支持，可以作为一种优秀的替代方案来替换STM32F103C6T6型号。该芯片具备高速处理能力、灵活的存储管理以及多种通信接口，非常适合于需要高性能计算与实时控制的应用场景。 #### 内核特性 - **CPU**：采用ARM Cortex-M3内核，运行频率高达72MHz，可提供90 DMIPS的计算性能，实现1.25 DMIPS/MHz的高效能。 - **中断管理**：配备了一个嵌套中断控制器，支持43个可屏蔽中断通道，并且能够在6个CPU周期内完成中断处理，极大地提高了系统的响应速度。 - **硬件加速**：支持单周期乘法运算和硬件除法，进一步提升了数据处理的速度和效率。 #### 存储与电源管理 - **存储器**：提供32至128KB的闪存内存，以及6至20KB的SRAM，确保了足够的程序存储空间和数据缓存能力。 - **电源管理**：支持2.0至3.6V的工作电压范围，包括上电复位(POR)、掉电复位(PDR)和可编程电压检测(PVD)等功能，增强了系统的稳定性和可靠性。 - **振荡器**：内置有8MHz工厂校准RC振荡器，以及一个32kHz的RC振荡器，用于RTC操作，并可通过外部4至16MHz的石英振荡器来实现更高的精度。 #### 低功耗模式 - 支持多种低功耗模式，如睡眠模式、停止模式和待机模式，通过VBAT供电来维持RTC和备份寄存器的运行，从而在不使用时显著降低能耗。 #### 模拟与数字转换器 - 配备了两个12位ADC转换器，转换时间仅需1μs，支持16个输入通道，具备双采样保持功能，并且能够与高级控制定时器同步工作，适用于需要高精度模拟信号采集的应用场合。 #### DMA与调试接口 - 提供7个DMA通道，支持包括定时器、ADC、SPI、I2C和USART在内的多种外设的数据传输需求，有效地减轻了CPU的负担。 - 支持串行线调试(SWD)和JTAG接口，便于开发人员进行调试和故障排查。 #### 输入/输出端口 - 拥有80个快速I/O端口，其中部分端口支持5V耐压，所有端口均可映射到16个外部中断向量，实现了原子读/修改/写操作，增强了对复杂外设的控制能力。 #### 定时器与通信接口 - 提供多达7个定时器，包括三个16位通用定时器、一个16位高级控制定时器、两个16位看门狗定时器以及一个SysTick定时器，满足了不同应用场景下的需求。 - 支持多达9种通信接口，包括2个I2C接口、3个USART、2个SPI、1个CAN接口和1个USB 2.0全速接口，极大地扩展了与外部设备交互的能力。 STM32FEBKC6T6凭借其强大的处理能力、丰富的外设资源以及出色的低功耗特性，在电机控制等领域具有广泛的应用前景，是STM32F103C6T6的理想替代产品。

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STM32FEBKx6

STM32FEBKx8 STM32FEBKxB

Performance line, ARM-based 32-bit MCU with Flash, USB, CAN,

seven 16-bit timers, two ADCs and nine communication interfaces

Preliminary Data

Features

 Core: ARM 32-bit Cortex™-M3 CPU

− 72 MHz, 90 DMIPS with 1.25

DMIPS/MHz

− Single-cycle multiplication and

hardware division

LQFP48

7 x 7 mm

LQFP100

14 x 14 mm

LQFP64

10 x 10 mm

BGA100

10 x 10 mm

− Nested interrupt controller with 43

maskable interrupt channels

− Interrupt processing (down to 6 CPU

cycles) with tail chaining

 Memories

− 32-to-128 Kbytes of Flash memory

− 6-to-20 Kbytes of SRAM

 Clock, reset and supply management

− 2.0 to 3.6 V application supply and I/Os

− POR, PDR, and programmable voltage

detector (PVD)

− 4-to-16 MHz quartz oscillator

− Internal 8 MHz factory-trimmed RC

− Internal 32 kHz RC

− PLL for CPU clock

− Dedicated 32 kHz oscillator for RTC with

calibration

 Low power

− Sleep, Stop and Standby modes

− VBAT supply for RTC and backup

registers

 2 x 12-bit, 1 µs A/D converters (16-

channel)

− Conversion range: 0 to 3.6 V

− Dual-sample and hold capability

− Synchronizable with advanced control

timer

− Temperature sensor

 DMA

− 7-channel DMA controller

− Peripherals supported: timers, ADC, SPIs,

I2Cs and USARTs

 Debug mode

− Serial wire debug (SWD) & JTAG interfaces

 Up to 80 fast I/O ports

− 32/49/80 5 V-tolerant I/Os

− All mappable on 16 external interrupt vectors

− Atomic read/modify/write operations

 Up to 7 timers

− Up to three 16-bit timers, each with up to 4

IC/OC/PWM or pulse counter

− 16-bit, 6-channel advanced control timer: up to 6

channels for PWM output Dead time generation

and emergency

− stop

− 2 x 16-bit watchdog timers (Independent and

Window)

− SysTick timer: a 24-bit downcounter

−

 Up to 9 communication interfaces

− Up to 2 x I2C interfaces (SMBus/PMBus)

− Up to 3 USARTs (ISO 7816 interface, LIN, IrDA

capability, modem control)

− Up to 2 SPIs (18 Mbit/s)

− CAN interface (2.0B Active)

− USB 2.0 full speed interface

Table 1. Device summary

July 2007 Rev 2 1/67

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to

change without notice.

www.st.com

Reference

Root part number

STM32FEBKx6

STM32FEBKC6, STM32FEBKR6

STM32FEBKx8

STM32FEBKC8,STM32FEBKR8

STM32FEBKV8

STM32FEBKxB

STM32FEBKRB STM32FEBKVB

Contents

STM32FEBKxx

2/67

Contents

1. Introduction ......................................................................................................................... 6

2. Description

...........................................................................................................................

2.1. Device overview

...........................................................................................................................

2.2. Overview 8

3. Pin descriptions

................................................................................................................

4. Memory mapping ..............................................................................................................22

5. Electrical characteristics ................................................................................................23

5.1. Test conditions .......................................................................................................................... 23

5.1.1. Minimum and maximum values

................................................................................................

5.1.2. Typical values 23

5.1.3. Typical curves 23

5.1.4. Loading capacitor ....................................................................................................................... 23

5.1.5. Pin input voltage ......................................................................................................................... 23

5.1.6. Power supply scheme

................................................................................................................

5.1.7. Current consumption measurement

.........................................................................................

5.2. Absolute maximum ratings

......................................................................................................

5.3. Operating conditions ................................................................................................................27

5.3.1. General operating conditions

....................................................................................................

5.3.2. Operating conditions at power-up / power-down ....................................................................27

5.3.3. Embedded reset and power control block characteristics .....................................................28

5.3.4. Embedded reference voltage .................................................................................................... 28

5.3.5. Supply current characteristics

...................................................................................................

5.3.6. External clock source characteristics

.......................................................................................

5.3.7. Internal clock source characteristics

........................................................................................

5.3.8. PLL characteristics ..................................................................................................................... 38

5.3.9. Memory characteristics ..............................................................................................................39

5.3.10. EMC characteristics ................................................................................................................... 40

5.3.11. Absolute maximum ratings (electrical sensitivity)

...................................................................

5.3.12. I/O port pin characteristics

........................................................................................................

5.3.13. NRST pin characteristics ........................................................................................................... 47

List of tables

STM32FEBKxx

https://houcheng-power.taobao.com www.st.com

List of tables

Table 1. Device summary................................................................................................................................. 1

Table 2. Device features and peripheral counts (STM32FEBKxx performance line).............................. 7

Table 3. Pin definitions ................................................................................................................................... 18

Table 4. Voltage characteristics ....................................................................................................................26

Table 5. Current characteristics .................................................................................................................... 26

Table 6. Thermal characteristics ...................................................................................................................27

Table 7. General operating conditions ......................................................................................................... 27

Table 8. Operating conditions at power-up / power-down .........................................................................27

Table 9. Embedded reset and power control block characteristics. ........................................................ 28

Table 10. Embedded internal reference voltage ...........................................................................................28

Table 11. Maximum current consumption in Run and Sleep modes ......................................................... 29

Table 12. Maximum current consumption in Stop and Standby modes ....................................................30

Table 13. Typical current consumption in Run and Sleep modes ..............................................................31

Table 14. Typical current consumption in Stop and Standby modes .........................................................32

Table 15. High-speed external (HSE) user clock characteristics ............................................................... 33

Table 16. Low-speed external user clock characteristics ............................................................................ 33

Table 17. HSE 4-16 MHz oscillator characteristics ...................................................................................... 35

Table 18. LSE oscillator characteristics (f

LSE

= 32.768 kHz) ......................................................................36

Table 19. HSI oscillator characteristics ..........................................................................................................37

Table 20. LSI oscillator characteristics .......................................................................................................... 37

Table 21. Low-power mode wakeup timings .................................................................................................38

Table 22. PLL characteristics .......................................................................................................................... 38

Table 23. Flash memory characteristics ........................................................................................................ 39

Table 24. Flash memory endurance and data retention ..............................................................................39

Table 25. EMS characteristics .........................................................................................................................40

Table 26. EMI characteristics .......................................................................................................................... 41

Table 27. ESD absolute maximum ratings .................................................................................................... 42

Table 28. Electrical sensitivities ...................................................................................................................... 42

Table 29. I/O static characteristics ..................................................................................................................43

Table 30. Output voltage characteristics ........................................................................................................45

Table 31. I/O AC characteristics ..................................................................................................................... 46

Table 32. NRST pin characteristics ................................................................................................................ 47

Table 33. TIMx characteristics .........................................................................................................................48

Table 34. I

C characteristics

............................................................................................................................

Table 35. SCL frequency (f

PCLK1

= 36 MHz.,V

= 3.3 V) .......................................................................... 50

Table 36. SPI characteristics ........................................................................................................................... 51

Table 37. USB DC electrical characteristics ..................................................................................................53

Table 38. USB: Full speed electrical characteristics .................................................................................... 54

Table 39. ADC characteristics .........................................................................................................................54

Table 40. ADC accuracy (f

PCLK2

= 14 MHz, f

ADC

= 14 MHz, R

AIN

<10 k

Ω

, V

DDA

= 3.3 V)

....................

Table 41. TS characteristics

............................................................................................................................

Table 42. LFBGA100 - low profile fine pitch ball grid array package mechanical data ........................... 59

Table 43. LQFP100 ? 100-pin low-profile quad flat package mechanical data ........................................61

Table 44. LQFP64 ? 64 pin low-profile quad flat package mechanical data ............................................ 62

Table 45. LQFP48 ? 48 pin low-profile quad flat package mechanical data ............................................ 63

Table 46. Thermal characteristics ...................................................................................................................64

Table 47. Order codes ......................................................................................................................................65

4/67

STM32FEBKxx

List of figures

https://houcheng-power.taobao.com www.st.com

List of figures

Figure 1. STM32FEBKxx performance line block diagram.........................................................................14

Figure 2. STM32FEBKxx performance line LQFP100 pinout.....................................................................15

Figure 3. STM32FEBKxx performance line LQFP64 pinout.......................................................................16

Figure 4. STM32FEBKxx performance line LQFP48 pinout...................................................................... 16

Figure 5. STM32FEBKxx performance line BGA100 ballout......................................................................17

Figure 6. Memory map..................................................................................................................................... 22

Figure 7. Pin loading conditions...................................................................................................................... 24

Figure 8. Pin input voltage............................................................................................................................... 24

Figure 9. Power supply scheme......................................................................................................................24

Figure 10. Current consumption measurement scheme............................................................................... 25

Figure 11. High-speed external clock source AC timing diagram................................................................34

Figure 12. Low-speed external clock source AC timing diagram.................................................................34

Figure 13. Typical application with a 8-MHz crystal.......................................................................................35

Figure 14. Typical application with a 32.768 kHz crystal.............................................................................. 36

Figure 15. Unused I/O pin connection..............................................................................................................44

Figure 16. I/O AC characteristics definition..................................................................................................... 47

Figure 17. Recommended NRST pin protection.............................................................................................48

Figure 18. I

C bus AC waveforms and measurement circuit........................................................................50

Figure 19. SPI timing diagram - slave mode and CPHA = 0........................................................................ 52

Figure 20. SPI timing diagram - slave mode and CPHA = 11).....................................................................52

Figure 21. SPI timing diagram - master mode................................................................................................ 53

Figure 22. USB timings: definition of data signal rise and fall time..............................................................54

Figure 23. ADC accuracy characteristics.........................................................................................................56

Figure 24. Typical connection diagram using the ADC................................................................................. 56

Figure 25. Power supply and reference decoupling (V

REF+

not connected to V

DDA

)............................... 57

Figure 26. Power supply and reference decoupling (V

REF+

connected to V

DDA

)......................................57

Figure 27. LFBGA100 - low profile fine pitch ball grid array package outline............................................ 59

Figure 28. Recommended PCB design rules (0.80/0.75 mm pitch BGA)...................................................60

Figure 29. LQFP100 ? 100-pin low-profile quad flat package outline......................................................... 61

Figure 30. LQFP64 ? 64 pin low-profile quad flat package outline..............................................................62

Figure 31. LQFP48 ? 48 pin low-profile quad flat package outline..............................................................63

5/67

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