/*****************************************************************************
* Copyright (c) 2019, Nations Technologies Inc.
*
* All rights reserved.
* ****************************************************************************
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* modification, are permitted provided that the following conditions are met:
*
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/**
*\*\file n32g430_tim.c
*\*\author Nations
*\*\version v1.0.0
*\*\copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
**/
#include "n32g430_tim.h"
#include "n32g430_rcc.h"
/**
*\*\name TIM_Reset.
*\*\fun Reset the TIM registers.
*\*\param TIMx :
*\*\ - TIM1
*\*\ - TIM2
*\*\ - TIM3
*\*\ - TIM4
*\*\ - TIM5
*\*\ - TIM6
*\*\ - TIM8
*\*\return none
**/
void TIM_Reset(TIM_Module* TIMx)
{
if (TIMx == TIM1)
{
RCC_APB2_Peripheral_Reset(RCC_APB2_PERIPH_TIM1);
}
else if (TIMx == TIM2)
{
RCC_APB1_Peripheral_Reset(RCC_APB1_PERIPH_TIM2);
}
else if (TIMx == TIM3)
{
RCC_APB1_Peripheral_Reset(RCC_APB1_PERIPH_TIM3);
}
else if (TIMx == TIM4)
{
RCC_APB1_Peripheral_Reset(RCC_APB1_PERIPH_TIM4);
}
else if (TIMx == TIM5)
{
RCC_APB1_Peripheral_Reset(RCC_APB1_PERIPH_TIM5);
}
else if (TIMx == TIM6)
{
RCC_APB1_Peripheral_Reset(RCC_APB1_PERIPH_TIM6);
}
else if (TIMx == TIM8)
{
RCC_APB2_Peripheral_Reset(RCC_APB2_PERIPH_TIM8);
}
}
/**
*\*\name TIM_Base_Count_Mode_Set.
*\*\fun Initializes the TIM cnt mode in up mode or down mode.
*\*\param TIMx:
*\*\ - TIM1
*\*\ - TIM2
*\*\ - TIM3
*\*\ - TIM4
*\*\ - TIM5
*\*\ - TIM8
*\*\param cnt_mode
*\*\ - TIM_CNT_MODE_UP
*\*\ - TIM_CNT_MODE_DOWN
*\*\ - TIM_CNT_MODE_CENTER_ALIGN1 TIM Center Aligned Mode1
*\*\ - TIM_CNT_MODE_CENTER_ALIGN2 TIM Center Aligned Mode2
*\*\ - TIM_CNT_MODE_CENTER_ALIGN3 TIM Center Aligned Mode3
*\*\return none
*\*\note The counting direction of TIM6 is fixed upward counting
**/
void TIM_Base_Count_Mode_Set(TIM_Module* TIMx, uint32_t cnt_mode)
{
uint32_t temp_value = 0;
temp_value = TIMx->CTRL1;
/* Reset the CMS and DIR Bits */
temp_value &= (uint32_t)(~((uint32_t)(TIM_CTRL1_DIR | TIM_CTRL1_CAMSEL)));
/* Set the Counter Mode */
temp_value |= cnt_mode;
/* Write to TIMx CTRL1 register */
TIMx->CTRL1 = temp_value;
}
/**
*\*\name TIM_Base_Center_Aligned_Mode_OC4_7_8_9_Trigger_Set.
*\*\param TIMx:
*\*\ - TIM1
*\*\param trigger_mode_in_center_aligned_mode
*\*\ - TIM_UP_COUNTING_OC4_7_8_9_TRIGGER_VALID
*\*\ - TIM_DOWN_COUNTING_OC4_7_8_9_TRIGGER_VALID
*\*\ - TIM_UP_DOWN_COUNTING_OC4_7_8_9_TRIGGER_VALID
*\*\return none
**/
void TIM_Base_Center_Aligned_Mode_OC4_7_8_9_Trigger_Set(TIM_Module* TIMx, uint32_t trigger_mode_in_center_aligned_mode)
{
uint32_t temp_value = 0;
temp_value = TIMx->CTRL1;
/* Reset the CMS and DIR Bits */
temp_value &= (uint32_t)(~((uint32_t)TIM_CENTER_ALIGNED_OC4_7_8_9_MASK));
/* Set the Counter Mode */
temp_value |= trigger_mode_in_center_aligned_mode;
/* Write to TIMx CTRL1 register */
TIMx->CTRL1 = temp_value;
}
/**
*\*\name TIM_Asymmetric_Enable.
*\*\param TIMx:
*\*\ - TIM1
*\*\return none
**/
void TIM_Asymmetric_Enable(TIM_Module* TIMx)
{
TIMx->CTRL1 |= TIM_ASMMETRIC_ENABLE;
}
/**
*\*\name TIM_Asymmetric_Disable.
*\*\param TIMx:
*\*\ - TIM1
*\*\return none
**/
void TIM_Asymmetric_Disable(TIM_Module* TIMx)
{
TIMx->CTRL1 &= (uint32_t)(~((uint32_t)TIM_ASMMETRIC_ENABLE));
}
/**
*\*\name TIM_Base_Auto_Reload_Set.
*\*\fun Initializes the TIM AR value
*\*\param TIMx:
*\*\ - TIM1
*\*\ - TIM2
*\*\ - TIM3
*\*\ - TIM4
*\*\ - TIM5
*\*\ - TIM6
*\*\ - TIM8
*\*\param auto_reload:
- [1, 0xffff]
*\*\return none
**/
void TIM_Base_Auto_Reload_Set(TIM_Module* TIMx, uint16_t auto_reload)
{
TIMx->AR = auto_reload;
}
/**
*\*\name TIM_Base_Prescaler_Set.
*\*\fun Initializes the TIM PSC value
*\*\param TIMx:
*\*\ - TIM1
*\*\ - TIM2
*\*\ - TIM3
*\*\ - TIM4
*\*\ - TIM5
*\*\ - TIM6
*\*\ - TIM8
*\*\param prescaler
*\*\return none
**/
void TIM_Base_Prescaler_Set(TIM_Module* TIMx, uint16_t prescaler)
{
TIMx->PSC = prescaler;
}
/**
*\*\name TIM_Base_Reload_Mode_Set.
*\*\fun Initializes the TIM reload mode
*\*\param TIMx:
*\*\ - TIM1
*\*\ - TIM2
*\*\ - TIM3
*\*\ - TIM4
*\*\ - TIM5
*\*\ - TIM6
*\*\ - TIM8
*\*\param prescaler_reload_mode:
**\ - TIM_PSC_RELOAD_MODE_IMMEDIATE
**\ - TIM_PSC_RELOAD_MODE_UPDATE
*\*\return none
**/
void TIM_Base_Reload_Mode_Set(TIM_Module* TIMx, uint16_t prescaler_reload_mode)
{
TIMx->EVTGEN = prescaler_reload_mode;
}
/**
*\*\name TIM_Base_Repeat_Count_Set.
*\*\fun Initializes the TIM repeat cnt
*\*\param TIMx:
*\*\ - TIM1
*\*\ - TIM8
*\*\param repeat_cnt
*\*\ - [0,255]
*\*\return none
**/
void TIM_Base_Repeat_Count_Set(TIM_Module* TIMx, uint8_t repeat_cnt)
{
TIMx->REPCNT = repeat_cnt;
}
/**
*\*\name TIM_Base_Channel1.
*\*\param TIMx:
*\*\ - TIM1
*\*\ - TIM2
*\*\ - TIM3
*\*\ - TIM4
*\*\ - TIM5
*\*\ - TIM8
*\*\param channel_selection:
**\ - 1
**\ CH1 is from COMP
**\ - 0
**\ CH1 is from IO
*\*\return none
*\*\note not for TIM6
**/
void TIM_Base_Channel1(TIM_Module* TIMx, bool channel_selection)
{
if(channel_selection)
{
TIMx->CTRL1 |= TIM_CH1_SEL;
}
else
{
TIMx->CTRL1 &= (uint32_t)(~TIM_CH1_SEL);
}
}
/**
*\*\name TIM_Base_Channel2.
*\*\param TIMx:
*\*\ - TIM2
*\*\param channel_selection:
**\ - 1
**\ CH2 is from LSE
**\ - 0
**\ CH2 is from IO
*\*\return none
**/
void TIM_Base_Channel2(TIM_Module* TIMx, bool channel_selection)
{
if(channel_selection)
{
TIMx->CTRL1 |= TIM_CH2_SEL;
}
else
{
TIMx->CTRL1 &= (uint32_t)(~TIM_CH2_SEL);
}
}
/**
*\*\name TIM_Base_Channel3.
*\*\param TIMx:
*\*\ - TIM2
*\*\param channel_selection:
**\ - 1
**\ CH3 is