/**
**********************************************************************************************************************
* @file stm32h7rsxx_hal_i3c.c
* @author MCD Application Team
* @brief I3C HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Improvement Inter Integrated Circuit (I3C) peripheral:
* + Initialization and de-initialization functions
* + IO operation functions
* + Peripheral State and Errors functions
*
**********************************************************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
**********************************************************************************************************************
@verbatim
======================================================================================================================
##### How to use this driver #####
======================================================================================================================
[..]
The I3C HAL driver can be used as follows:
(#) Declare a I3C_HandleTypeDef handle structure, for example:
I3C_HandleTypeDef hi3c;
(#) Declare a I3C_XferTypeDef transfer descriptor structure, for example:
I3C_XferTypeDef ContextBuffers;
(#)Initialize the I3C low level resources by implementing the HAL_I3C_MspInit() API:
(##) Enable the I3Cx interface clock
(##) I3C pins configuration
(+++) Enable the clock for the I3C GPIOs
(+++) Configure I3C pins as alternate function push-pull with no-pull
(##) NVIC configuration if you need to use interrupt process
(+++) Configure the I3Cx interrupt priority
(+++) Enable the NVIC I3C IRQ Channel
(##) DMA Configuration if you need to use DMA process
(+++) Declare a DMA_HandleTypeDef handle structure for
the Command Common Code (CCC) management channel
(+++) Declare a DMA_HandleTypeDef handle structure for
the transmit channel
(+++) Declare a DMA_HandleTypeDef handle structure for
the receive channel
(+++) Declare a DMA_HandleTypeDef handle structure for
the status channel
(+++) Enable the DMAx interface clock
(+++) Configure the DMA handle parameters
(+++) Configure the DMA Command Common Code (CCC) channel
(+++) Configure the DMA Tx channel
(+++) Configure the DMA Rx channel
(+++) Configure the DMA Status channel
(+++) Associate the initialized DMA handle to the hi3c DMA CCC, Tx, Rx or Status handle as necessary
(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
the DMA CCC, Tx, Rx or Status instance
(#) Configure the HAL I3C Communication Mode as Controller or Target in the hi3c Init structure.
(#) Configure the Controller Communication Bus characterics for Controller mode.
This mean, configure the parameters SDAHoldTime, WaitTime, SCLPPLowDuration,
SCLI3CHighDuration, SCLODLowDuration, SCLI2CHighDuration, BusFreeDuration,
BusIdleDuration in the LL_I3C_CtrlBusConfTypeDef structure through h3c Init structure.
(#) Configure the Target Communication Bus characterics for Target mode.
This mean, configure the parameter BusAvailableDuration in the LL_I3C_TgtBusConfTypeDef structure
through h3c Init structure.
All these parameters for Controller or Target can be configured directly in user code or
by using CubeMx generation.
To help the computation of the different parameters, the recommendation is to use CubeMx.
Those parameters can be modified after the hi3c initialization by using
HAL_I3C_Ctrl_BusCharacteristicConfig() for controller and
HAL_I3C_Tgt_BusCharacteristicConfig() for target.
(#) Initialize the I3C registers by calling the HAL_I3C_Init(), configures also the low level Hardware
(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I3C_MspInit(&hi3c) API.
(#) Configure the different FIFO parameters in I3C_FifoConfTypeDef structure as RxFifoThreshold, TxFifoThreshold
for Controller or Target mode.
And enable/disable the Control or Status FIFO only for Controller Mode.
Use HAL_I3C_SetConfigFifo() function to finalize the configuration, and HAL_I3C_GetConfigFifo() to retrieve
FIFO configuration.
Possibility to clear the FIFO configuration by using HAL_I3C_ClearConfigFifo() which reset the configuration
FIFO to their default hardware value
(#) Configure the different additional Controller configuration in I3C_CtrlConfTypeDef structure as DynamicAddr,
StallTime, HotJoinAllowed, ACKStallState, CCCStallState, TxStallState, RxStallState, HighKeeperSDA.
Use HAL_I3C_Ctrl_Config() function to finalize the Controller configuration.
(#) Configure the different additional Target configuration in I3C_TgtConfTypeDef structure as Identifier,
MIPIIdentifier, CtrlRoleRequest, HotJoinRequest, IBIRequest, IBIPayload, IBIPayloadSize, MaxReadDataSize,
MaxWriteDataSize, CtrlCapability, GroupAddrCapability, DataTurnAroundDuration, MaxReadTurnAround,
MaxDataSpeed, MaxSpeedLimitation, HandOffActivityState, HandOffDelay, PendingReadMDB.
Use HAL_I3C_Tgt_Config() function to finalize the Target configuration.
(#) Before initiate any IO operation, the application must launch an assignment of the different
Target dynamic address by using HAL_I3C_Ctrl_DynAddrAssign() in polling mode or
HAL_I3C_Ctrl_DynAddrAssign_IT() in interrupt mode.
This procedure is named Enter Dynamic Address Assignment (ENTDAA CCC command).
For the initiation of ENTDAA procedure from the controller, each target connected and powered on the I3C bus
must repond to this particular Command Common Code by sending its proper Payload (a amount of 48bits which
contain the target characteristics)
Each time a target responds to ENTDAA sequence, the application is informed through
HAL_I3C_TgtReqDynamicAddrCallback() of the reception of the target paylaod.
And then application must send a associated dynamic address through HAL_I3C_Ctrl_SetDynAddr().
This procedure in loop automatically in hardware side until a target respond to repeated ENTDAA sequence.
The application is informed of the end of the procedure at reception of HAL_I3C_CtrlDAACpltCallback().
Then application can easily retrieve ENTDAA payload information through HAL_I3C_Get_ENTDAA_Payload_Info()
function.
At the end of procedure, the function HAL_I3C_Ctrl_ConfigBusDevices() must be called to store in hardware
register part the target capabilities as Dynamic address, IBI support with or without additional data byte,
Controller role request support, Controller stop transfer after IBI through I3C_DeviceConfTypeDef structure.
(#) Other action to be done, before initiate any IO operation, the application must prepare the different frame
descriptor with its associated buffer allocation in their side.
Configure the different information related to CCC transfer through I3C_CCCTypeDef structure
Configure the different informati
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STM32H7R实现UCOS-III消息队列【支持STM32H7R系列】
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STM32H7R实现UCOS-III消息队列【支持STM32H7R系列】 (316个子文件)
keilkill.bat 447B
stm32h7rsxx_hal_i3c.c 358KB
stm32h7rsxx_hal_cryp.c 290KB
stm32h7rsxx_hal_tim.c 265KB
stm32h7rsxx_hal_i2c.c 256KB
lib_str.c 200KB
stm32h7rsxx_hal_mmc.c 191KB
stm32h7rsxx_hal_dma_ex.c 172KB
stm32h7rsxx_hal_uart.c 166KB
stm32h7rsxx_hal_adc.c 150KB
stm32h7rsxx_hal_jpeg.c 144KB
stm32h7rsxx_hal_usart.c 135KB
stm32h7rsxx_hal_smartcard.c 128KB
stm32h7rsxx_hal_sd.c 128KB
stm32h7rsxx_hal_fdcan.c 123KB
stm32h7rsxx_hal_lptim.c 120KB
lib_mem.c 120KB
stm32h7rsxx_hal_spi.c 119KB
stm32h7rsxx_hal_tim_ex.c 118KB
stm32h7rsxx_hal_eth.c 117KB
stm32h7rsxx_hal_rcc_ex.c 116KB
stm32h7rsxx_hal_xspi.c 116KB
cpu_core.c 112KB
os_task.c 112KB
stm32h7rsxx_hal_pka.c 109KB
stm32h7rsxx_hal_irda.c 107KB
stm32h7rsxx_hal_hash.c 107KB
stm32h7rsxx_hal_smbus.c 97KB
stm32h7rsxx_hal_adc_ex.c 96KB
stm32h7rsxx_hal_sai.c 93KB
os_core.c 92KB
stm32h7rsxx_hal_rtc_ex.c 91KB
stm32h7rsxx_hal_i2s.c 88KB
stm32h7rsxx_hal_rtc.c 82KB
stm32h7rsxx_hal_rcc.c 76KB
stm32h7rsxx_hal_dma2d.c 76KB
stm32h7rsxx_hal_nand.c 73KB
stm32h7rsxx_hal_ltdc.c 73KB
stm32h7rsxx_hal_dcmipp.c 72KB
stm32h7rsxx_hal_mdf.c 70KB
stm32h7rsxx_hal_gfxtim.c 68KB
stm32h7rsxx_ll_dma.c 65KB
stm32h7rsxx_ll_usb.c 64KB
os_tmr.c 63KB
stm32h7rsxx_hal_pcd.c 63KB
stm32h7rsxx_hal_pssi.c 62KB
stm32h7rsxx_hal_dma.c 60KB
stm32h7rsxx_ll_sdmmc.c 60KB
stm32h7rsxx_ll_rcc.c 58KB
stm32h7rsxx_hal_spdifrx.c 57KB
os_flag.c 56KB
stm32h7rsxx_ll_tim.c 56KB
stm32h7rsxx_hal_hcd.c 55KB
sys.c 54KB
stm32h7rsxx_hal_pwr_ex.c 54KB
stm32h7rsxx_hal.c 54KB
stm32h7rsxx_hal_nor.c 52KB
stm32h7rsxx_ll_adc.c 49KB
stm32h7rsxx_hal_cordic.c 46KB
os_mutex.c 45KB
stm32h7rsxx_hal_sdram.c 44KB
lcd.c 42KB
stm32h7rsxx_ll_fmc.c 40KB
stm32h7rsxx_hal_flash_ex.c 40KB
os_q.c 40KB
lcd_ex.c 40KB
stm32h7rsxx_ll_spi.c 38KB
os_sem.c 38KB
stm32h7rsxx_hal_sram.c 38KB
stm32h7rsxx_hal_uart_ex.c 37KB
stm32h7rsxx_ll_utils.c 36KB
stm32h7rsxx_hal_dts.c 34KB
stm32h7rsxx_hal_cryp_ex.c 33KB
cpu_c.c 33KB
stm32h7rsxx_hal_cec.c 32KB
stm32h7rsxx_hal_rng.c 32KB
stm32h7rsxx_hal_mce.c 32KB
stm32h7rsxx_hal_ramecc.c 31KB
stm32h7rsxx_ll_rtc.c 30KB
os_cpu_c.c 30KB
stm32h7rsxx_hal_gfxmmu.c 29KB
stm32h7rsxx_hal_mdios.c 28KB
stm32h7rsxx_hal_flash.c 28KB
stm32h7rsxx_hal_eth_ex.c 27KB
stm32h7rsxx_ll_dma2d.c 26KB
stm32h7rsxx_hal_pwr.c 26KB
stm32h7rsxx_hal_gpu2d.c 24KB
os_time.c 23KB
os_tick.c 23KB
lib_ascii.c 23KB
stm32h7rsxx_hal_cortex.c 22KB
os_stat.c 21KB
os_dbg.c 20KB
stm32h7rsxx_hal_gpio.c 20KB
stm32h7rsxx_ll_usart.c 19KB
stm32h7rsxx_hal_exti.c 18KB
stm32h7rsxx_hal_iwdg.c 18KB
stm32h7rsxx_hal_crc.c 17KB
stm32h7rsxx_hal_icache.c 16KB
stm32h7rsxx_hal_smartcard_ex.c 16KB
共 316 条
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